Rename llvm/Analysis/LiveVar/FunctionLiveVarInfo.h -> llvm/CodeGen/FunctionLiveVarInfo.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5284 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Analysis/LiveVar/BBLiveVar.cpp

@@ -5,7 +5,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "BBLiveVar.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/Support/CFG.h"

lib/Analysis/LiveVar/FunctionLiveVarInfo.cpp

@@ -5,14 +5,14 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
-#include "BBLiveVar.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/Support/CFG.h"
 #include "Support/PostOrderIterator.h"
 #include "Support/SetOperations.h"
 #include "Support/CommandLine.h"
+#include "BBLiveVar.h"
 
 static RegisterAnalysis<FunctionLiveVarInfo>
 X("livevar", "Live Variable Analysis");

lib/CodeGen/InstrSched/InstrScheduling.cpp

@@ -9,7 +9,7 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
 #include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/BasicBlock.h"
 #include "Support/CommandLine.h"
@@ -1524,7 +1524,7 @@ bool InstructionSchedulingWithSSA::runOnFunction(Function &F)
         cerr << "\n*** TRACE OF INSTRUCTION SCHEDULING OPERATIONS\n\n";
       
       // expensive!
-      SchedPriorities schedPrio(&F, graph,getAnalysis<FunctionLiveVarInfo>());
+      SchedPriorities schedPrio(&F, graph, getAnalysis<FunctionLiveVarInfo>());
       SchedulingManager S(target, graph, schedPrio);
           
       ChooseInstructionsForDelaySlots(S, MBB, graph); // modifies graph

lib/CodeGen/InstrSched/SchedPriorities.cpp

@@ -11,7 +11,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "SchedPriorities.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/Support/CFG.h"
 #include "Support/PostOrderIterator.h"

lib/CodeGen/RegAlloc/PhyRegAlloc.cpp

@@ -12,7 +12,7 @@
 #include "llvm/CodeGen/MachineInstrAnnot.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionInfo.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/Analysis/LoopInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetFrameInfo.h"

lib/Target/SparcV9/InstrSched/InstrScheduling.cpp

@@ -9,7 +9,7 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineCodeForInstruction.h"
 #include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/BasicBlock.h"
 #include "Support/CommandLine.h"
@@ -1524,7 +1524,7 @@ bool InstructionSchedulingWithSSA::runOnFunction(Function &F)
         cerr << "\n*** TRACE OF INSTRUCTION SCHEDULING OPERATIONS\n\n";
       
       // expensive!
-      SchedPriorities schedPrio(&F, graph,getAnalysis<FunctionLiveVarInfo>());
+      SchedPriorities schedPrio(&F, graph, getAnalysis<FunctionLiveVarInfo>());
       SchedulingManager S(target, graph, schedPrio);
           
       ChooseInstructionsForDelaySlots(S, MBB, graph); // modifies graph

lib/Target/SparcV9/InstrSched/SchedPriorities.cpp

@@ -11,7 +11,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "SchedPriorities.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/Support/CFG.h"
 #include "Support/PostOrderIterator.h"

lib/Target/SparcV9/LiveVar/BBLiveVar.cpp

@@ -5,7 +5,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "BBLiveVar.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/Support/CFG.h"

lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp

@@ -5,14 +5,14 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
-#include "BBLiveVar.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/Support/CFG.h"
 #include "Support/PostOrderIterator.h"
 #include "Support/SetOperations.h"
 #include "Support/CommandLine.h"
+#include "BBLiveVar.h"
 
 static RegisterAnalysis<FunctionLiveVarInfo>
 X("livevar", "Live Variable Analysis");

lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp

@@ -12,7 +12,7 @@
 #include "llvm/CodeGen/MachineInstrAnnot.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionInfo.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
 #include "llvm/Analysis/LoopInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetFrameInfo.h"

lib/Target/SparcV9/SparcV9RegInfo.cpp

@@ -15,15 +15,18 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineInstrAnnot.h"
 #include "llvm/CodeGen/RegAllocCommon.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"   // FIXME: Remove
 #include "llvm/iTerminators.h"
 #include "llvm/iOther.h"
 #include "llvm/Function.h"
 #include "llvm/DerivedTypes.h"
-#include <values.h>
 using std::cerr;
 using std::vector;
 
+enum {
+  BadRegClass = ~0
+};
+
 UltraSparcRegInfo::UltraSparcRegInfo(const UltraSparc &tgt)
   : TargetRegInfo(tgt), NumOfIntArgRegs(6), 
     NumOfFloatArgRegs(32), InvalidRegNum(1000) {
@@ -390,7 +393,7 @@ void UltraSparcRegInfo::suggestRegs4MethodArgs(const Function *Meth,
     assert(LR && "No live range found for method arg");
     
     unsigned regType = getRegType(LR);
-    unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg (unused)
+    unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg (unused)
     
     int regNum = (regType == IntRegType)
       ? regNumForIntArg(/*inCallee*/ true, isVarArgs,
@@ -434,7 +437,7 @@ void UltraSparcRegInfo::colorMethodArgs(const Function *Meth,
     //
     bool isArgInReg = false;
     unsigned UniArgReg = InvalidRegNum;	// reg that LR MUST be colored with
-    unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg
+    unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg
     
     int regNum = (regType == IntRegType)
       ? regNumForIntArg(/*inCallee*/ true, isVarArgs,
@@ -605,7 +608,7 @@ void UltraSparcRegInfo::suggestRegs4CallArgs(MachineInstr *CallMI,
                   "all args (even consts) must be defined before");
 
     unsigned regType = getRegType( LR );
-    unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg (unused)
+    unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg (unused)
 
     // Choose a register for this arg depending on whether it is
     // an INT or FP value.  Here we ignore whether or not it is a
@@ -657,7 +660,7 @@ UltraSparcRegInfo::InitializeOutgoingArg(MachineInstr* CallMI,
 {
   MachineInstr *AdMI;
   bool isArgInReg = false;
-  unsigned UniArgReg = MAXINT;          // unused unless initialized below
+  unsigned UniArgReg = BadRegClass;          // unused unless initialized below
   if (UniArgRegOrNone != InvalidRegNum)
     {
       isArgInReg = true;
@@ -847,7 +850,7 @@ void UltraSparcRegInfo::colorCallArgs(MachineInstr *CallMI,
     //
     bool isArgInReg = false;
     unsigned UniArgReg = InvalidRegNum;	  // reg that LR MUST be colored with
-    unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg
+    unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg
     
     // Find the register that must be used for this arg, depending on
     // whether it is an INT or FP value.  Here we ignore whether or not it