6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-20 10:30:03 +00:00
Code Issues Projects Releases Wiki Activity

Revert this. It was breaking stuff.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64428 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2009-02-13 02:16:35 +00:00
parent 54fc7d6714
commit 92c1e12647
5 changed files with 113 additions and 19 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

51
lib/CodeGen/SelectionDAG/FastISel.cpp
View File

@ -323,21 +323,32 @@ bool FastISel::SelectCall(User *I) {
CU.getFilename());
unsigned Line = SPI->getLine();
unsigned Col = SPI->getColumn();
unsigned ID = DW->RecordSourceLine(Line, Col, SrcFile);
unsigned Idx = MF.getOrCreateDebugLocID(SrcFile, Line, Col);
setCurDebugLoc(DebugLoc::get(Idx));
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
BuildMI(MBB, DL, II).addImm(ID);
}
return true;
}
case Intrinsic::dbg_region_start: {
DbgRegionStartInst *RSI = cast<DbgRegionStartInst>(I);
if (DW && DW->ValidDebugInfo(RSI->getContext()))
DW->RecordRegionStart(cast<GlobalVariable>(RSI->getContext()));
if (DW && DW->ValidDebugInfo(RSI->getContext())) {
unsigned ID =
DW->RecordRegionStart(cast<GlobalVariable>(RSI->getContext()));
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
BuildMI(MBB, DL, II).addImm(ID);
}
return true;
}
case Intrinsic::dbg_region_end: {
DbgRegionEndInst *REI = cast<DbgRegionEndInst>(I);
if (DW && DW->ValidDebugInfo(REI->getContext()))
DW->RecordRegionEnd(cast<GlobalVariable>(REI->getContext()));
if (DW && DW->ValidDebugInfo(REI->getContext())) {
unsigned ID =
DW->RecordRegionEnd(cast<GlobalVariable>(REI->getContext()));
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
BuildMI(MBB, DL, II).addImm(ID);
}
return true;
}
case Intrinsic::dbg_func_start: {
@ -357,14 +368,42 @@ bool FastISel::SelectCall(User *I) {
// function start. It will be emitted at asm emission time. However,
// create a label if this is a beginning of inlined function.
unsigned Line = Subprogram.getLineNumber();
unsigned LabelID = DW->RecordSourceLine(Line, 0, SrcFile);
setCurDebugLoc(DebugLoc::get(MF.getOrCreateDebugLocID(SrcFile, Line, 0)));
if (DW->getRecordSourceLineCount() != 1) {
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
BuildMI(MBB, DL, II).addImm(LabelID);
}
}
return true;
}
case Intrinsic::dbg_declare:
// FIXME: Do something correct here when declare stuff is working again.
case Intrinsic::dbg_declare: {
DbgDeclareInst *DI = cast<DbgDeclareInst>(I);
Value *Variable = DI->getVariable();
if (DW && DW->ValidDebugInfo(Variable)) {
// Determine the address of the declared object.
Value *Address = DI->getAddress();
if (BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
Address = BCI->getOperand(0);
AllocaInst *AI = dyn_cast<AllocaInst>(Address);
// Don't handle byval struct arguments or VLAs, for example.
if (!AI) break;
DenseMap<const AllocaInst*, int>::iterator SI =
StaticAllocaMap.find(AI);
if (SI == StaticAllocaMap.end()) break; // VLAs.
int FI = SI->second;
// Determine the debug globalvariable.
GlobalValue *GV = cast<GlobalVariable>(Variable);
// Build the DECLARE instruction.
const TargetInstrDesc &II = TII.get(TargetInstrInfo::DECLARE);
BuildMI(MBB, DL, II).addFrameIndex(FI).addGlobalAddress(GV);
}
return true;
}
case Intrinsic::eh_exception: {
MVT VT = TLI.getValueType(I->getType());
switch (TLI.getOperationAction(ISD::EXCEPTIONADDR, VT)) {

33
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
View File

@ -1274,9 +1274,38 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
switch (TLI.getOperationAction(ISD::DBG_STOPPOINT, MVT::Other)) {
case TargetLowering::Promote:
default: assert(0 && "This action is not supported yet!");
case TargetLowering::Expand:
Result = Tmp1; // chain
case TargetLowering::Expand: {
DwarfWriter *DW = DAG.getDwarfWriter();
bool useDEBUG_LOC = TLI.isOperationLegalOrCustom(ISD::DEBUG_LOC,
MVT::Other);
bool useLABEL = TLI.isOperationLegalOrCustom(ISD::DBG_LABEL, MVT::Other);
const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(Node);
GlobalVariable *CU_GV = cast<GlobalVariable>(DSP->getCompileUnit());
if (DW && (useDEBUG_LOC || useLABEL) && !CU_GV->isDeclaration()) {
DICompileUnit CU(cast<GlobalVariable>(DSP->getCompileUnit()));
unsigned SrcFile = DW->RecordSource(CU.getDirectory(),
CU.getFilename());
unsigned Line = DSP->getLine();
unsigned Col = DSP->getColumn();
// A bit self-referential to have DebugLoc on Debug_Loc nodes, but
// it won't hurt anything.
if (useDEBUG_LOC) {
SDValue Ops[] = { Tmp1, DAG.getConstant(Line, MVT::i32),
DAG.getConstant(Col, MVT::i32),
DAG.getConstant(SrcFile, MVT::i32) };
Result = DAG.getNode(ISD::DEBUG_LOC, dl, MVT::Other, Ops, 4);
} else {
unsigned ID = DW->RecordSourceLine(Line, Col, SrcFile);
Result = DAG.getLabel(ISD::DBG_LABEL, dl, Tmp1, ID);
}
} else {
Result = Tmp1; // chain
}
break;
}
case TargetLowering::Legal: {
LegalizeAction Action = getTypeAction(Node->getOperand(1).getValueType());
if (Action == Legal && Tmp1 == Node->getOperand(0))

36
lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
View File

@ -3912,18 +3912,24 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
case Intrinsic::dbg_region_start: {
DwarfWriter *DW = DAG.getDwarfWriter();
DbgRegionStartInst &RSI = cast<DbgRegionStartInst>(I);
if (DW && DW->ValidDebugInfo(RSI.getContext()))
DW->RecordRegionStart(cast<GlobalVariable>(RSI.getContext()));
if (DW && DW->ValidDebugInfo(RSI.getContext())) {
unsigned LabelID =
DW->RecordRegionStart(cast<GlobalVariable>(RSI.getContext()));
DAG.setRoot(DAG.getLabel(ISD::DBG_LABEL, getCurDebugLoc(),
getRoot(), LabelID));
}
return 0;
}
case Intrinsic::dbg_region_end: {
DwarfWriter *DW = DAG.getDwarfWriter();
DbgRegionEndInst &REI = cast<DbgRegionEndInst>(I);
if (DW && DW->ValidDebugInfo(REI.getContext()))
DW->RecordRegionEnd(cast<GlobalVariable>(REI.getContext()));
if (DW && DW->ValidDebugInfo(REI.getContext())) {
unsigned LabelID =
DW->RecordRegionEnd(cast<GlobalVariable>(REI.getContext()));
DAG.setRoot(DAG.getLabel(ISD::DBG_LABEL, getCurDebugLoc(),
getRoot(), LabelID));
}
return 0;
}
@ -3944,15 +3950,27 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
// function start. It will be emitted at asm emission time. However,
// create a label if this is a beginning of inlined function.
unsigned Line = Subprogram.getLineNumber();
unsigned LabelID = DW->RecordSourceLine(Line, 0, SrcFile);
if (DW->getRecordSourceLineCount() != 1)
DAG.setRoot(DAG.getLabel(ISD::DBG_LABEL, getCurDebugLoc(),
getRoot(), LabelID));
setCurDebugLoc(DebugLoc::get(DAG.getMachineFunction().
getOrCreateDebugLocID(SrcFile, Line, 0)));
getOrCreateDebugLocID(SrcFile, Line, 0)));
}
return 0;
}
case Intrinsic::dbg_declare:
// FIXME: Do something correct here when declare stuff is working again.
case Intrinsic::dbg_declare: {
DwarfWriter *DW = DAG.getDwarfWriter();
DbgDeclareInst &DI = cast<DbgDeclareInst>(I);
Value *Variable = DI.getVariable();
if (DW && DW->ValidDebugInfo(Variable))
DAG.setRoot(DAG.getNode(ISD::DECLARE, dl, MVT::Other, getRoot(),
getValue(DI.getAddress()), getValue(Variable)));
return 0;
}
case Intrinsic::eh_exception: {
if (!CurMBB->isLandingPad()) {

2
lib/CodeGen/VirtRegMap.cpp
View File

@ -1278,7 +1278,7 @@ void LocalSpiller::TransferDeadness(MachineBasicBlock *MBB, unsigned CurDist,
}
/// rewriteMBB - Keep track of which spills are available even after the
/// register allocator is done with them. If possible, avoid reloading vregs.
/// register allocator is done with them. If possible, avid reloading vregs.
void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
AvailableSpills &Spills) {
DOUT << "\n**** Local spiller rewriting MBB '"

10
lib/Target/X86/X86RegisterInfo.cpp
View File

@ -785,6 +785,12 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
.addReg(FramePtr, /*isDef=*/false, /*isImp=*/false, /*isKill=*/true);
if (needsFrameMoves) {
// Mark effective beginning of when frame pointer becomes valid.
FrameLabelId = MMI->NextLabelID();
BuildMI(MBB, MBBI, DL, TII.get(X86::DBG_LABEL)).addImm(FrameLabelId);
}
// Update EBP with the new base value...
BuildMI(MBB, MBBI, DL,
TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), FramePtr)
@ -808,9 +814,11 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
NumBytes = StackSize - X86FI->getCalleeSavedFrameSize();
unsigned ReadyLabelId = 0;
if (needsFrameMoves)
if (needsFrameMoves) {
// Mark effective beginning of when frame pointer is ready.
ReadyLabelId = MMI->NextLabelID();
BuildMI(MBB, MBBI, DL, TII.get(X86::DBG_LABEL)).addImm(ReadyLabelId);
}
// Skip the callee-saved push instructions.
while (MBBI != MBB.end() &&