Add MachineInstr::tieOperands, remove setIsTied().

Manage tied operands entirely internally to MachineInstr. This makes it
possible to change the representation of tied operands, as I will do
shortly.

The constraint that tied uses and defs must be in the same order was too
restrictive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163021 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-08-31 20:50:53 +00:00
parent 265bcb1e5b
commit 94083149fd
4 changed files with 31 additions and 20 deletions

View File

@ -782,6 +782,14 @@ public:
const TargetInstrInfo *TII,
const TargetRegisterInfo *TRI) const;
/// tieOperands - Add a tie between the register operands at DefIdx and
/// UseIdx. The tie will cause the register allocator to ensure that the two
/// operands are assigned the same physical register.
///
/// Tied operands are managed automatically for explicit operands in the
/// MCInstrDesc. This method is for exceptional cases like inline asm.
void tieOperands(unsigned DefIdx, unsigned UseIdx);
/// findTiedOperandIdx - Given the index of a tied register operand, find the
/// operand it is tied to. Defs are tied to uses and vice versa. Returns the
/// index of the tied operand which must exist.
@ -942,9 +950,11 @@ private:
/// untieRegOperand - Break any tie involving OpIdx.
void untieRegOperand(unsigned OpIdx) {
const MachineOperand &MO = getOperand(OpIdx);
if (MO.isReg() && MO.isTied())
getOperand(findTiedOperandIdx(OpIdx)).setIsTied(false);
MachineOperand &MO = getOperand(OpIdx);
if (MO.isReg() && MO.isTied()) {
getOperand(findTiedOperandIdx(OpIdx)).IsTied = false;
MO.IsTied = false;
}
}
/// addImplicitDefUseOperands - Add all implicit def and use operands to

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@ -390,11 +390,6 @@ public:
IsEarlyClobber = Val;
}
void setIsTied(bool Val = true) {
assert(isReg() && "Wrong MachineOperand accessor");
IsTied = Val;
}
void setIsDebug(bool Val = true) {
assert(isReg() && IsDef && "Wrong MachineOperand accessor");
IsDebug = Val;

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@ -728,12 +728,8 @@ void MachineInstr::addOperand(const MachineOperand &Op) {
// Set the IsTied bit if MC indicates this use is tied to a def.
if (Operands[OpNo].isUse()) {
int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO);
if (DefIdx != -1) {
MachineOperand &DefMO = getOperand(DefIdx);
assert(DefMO.isDef() && "Use tied to operand that isn't a def");
DefMO.IsTied = true;
Operands[OpNo].IsTied = true;
}
if (DefIdx != -1)
tieOperands(DefIdx, OpNo);
}
// If the register operand is flagged as early, mark the operand as such.
if (MCID->getOperandConstraint(OpNo, MCOI::EARLY_CLOBBER) != -1)
@ -1140,6 +1136,20 @@ int MachineInstr::findFirstPredOperandIdx() const {
return -1;
}
/// Mark operands at DefIdx and UseIdx as tied to each other.
void MachineInstr::tieOperands(unsigned DefIdx, unsigned UseIdx) {
assert(DefIdx < UseIdx && "Tied defs must precede the use");
MachineOperand &DefMO = getOperand(DefIdx);
MachineOperand &UseMO = getOperand(UseIdx);
assert(DefMO.isDef() && "DefIdx must be a def operand");
assert(UseMO.isUse() && "UseIdx must be a use operand");
assert(!DefMO.isTied() && "Def is already tied to another use");
assert(!UseMO.isTied() && "Use is already tied to another def");
DefMO.IsTied = true;
UseMO.IsTied = true;
}
/// Given the index of a tied register operand, find the operand it is tied to.
/// Defs are tied to uses and vice versa. Returns the index of the tied operand
/// which must exist.

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@ -945,12 +945,8 @@ EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
if (InlineAsm::isUseOperandTiedToDef(Flags, DefGroup)) {
unsigned DefIdx = GroupIdx[DefGroup] + 1;
unsigned UseIdx = GroupIdx.back() + 1;
for (unsigned j = 0; j != NumVals; ++j) {
assert(!MI->getOperand(DefIdx + j).isTied() &&
"Def is already tied to another use");
MI->getOperand(DefIdx + j).setIsTied();
MI->getOperand(UseIdx + j).setIsTied();
}
for (unsigned j = 0; j != NumVals; ++j)
MI->tieOperands(DefIdx + j, UseIdx + j);
}
}
break;