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Add MachineInstr::tieOperands, remove setIsTied().
Manage tied operands entirely internally to MachineInstr. This makes it possible to change the representation of tied operands, as I will do shortly. The constraint that tied uses and defs must be in the same order was too restrictive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163021 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -782,6 +782,14 @@ public:
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const TargetInstrInfo *TII,
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const TargetRegisterInfo *TRI) const;
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/// tieOperands - Add a tie between the register operands at DefIdx and
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/// UseIdx. The tie will cause the register allocator to ensure that the two
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/// operands are assigned the same physical register.
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///
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/// Tied operands are managed automatically for explicit operands in the
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/// MCInstrDesc. This method is for exceptional cases like inline asm.
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void tieOperands(unsigned DefIdx, unsigned UseIdx);
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/// findTiedOperandIdx - Given the index of a tied register operand, find the
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/// operand it is tied to. Defs are tied to uses and vice versa. Returns the
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/// index of the tied operand which must exist.
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@@ -942,9 +950,11 @@ private:
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/// untieRegOperand - Break any tie involving OpIdx.
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void untieRegOperand(unsigned OpIdx) {
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const MachineOperand &MO = getOperand(OpIdx);
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if (MO.isReg() && MO.isTied())
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getOperand(findTiedOperandIdx(OpIdx)).setIsTied(false);
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MachineOperand &MO = getOperand(OpIdx);
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if (MO.isReg() && MO.isTied()) {
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getOperand(findTiedOperandIdx(OpIdx)).IsTied = false;
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MO.IsTied = false;
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}
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}
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/// addImplicitDefUseOperands - Add all implicit def and use operands to
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