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Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested

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was inserted or not.  This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55375 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson
2008-08-26 18:03:31 +00:00
parent a0b3909d43
commit 940f83e772
18 changed files with 78 additions and 59 deletions
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lib/Target/Alpha/AlphaInstrInfo.cpp
+7 -5
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@@ -133,15 +133,15 @@ unsigned AlphaInstrInfo::InsertBranch(MachineBasicBlock &MBB,
return 2;
}
void AlphaInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
bool AlphaInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *DestRC,
const TargetRegisterClass *SrcRC) const {
//cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
if (DestRC != SrcRC) {
cerr << "Not yet supported!";
abort();
// Not yet supported!
return false;
}
if (DestRC == Alpha::GPRCRegisterClass) {
@@ -151,9 +151,11 @@ void AlphaInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
} else if (DestRC == Alpha::F8RCRegisterClass) {
BuildMI(MBB, MI, get(Alpha::CPYST), DestReg).addReg(SrcReg).addReg(SrcReg);
} else {
cerr << "Attempt to copy register that is not GPR or FPR";
abort();
// Attempt to copy register that is not GPR or FPR
return false;
}
return true;
}
void