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Reuse the enum names from X86Desc in the X86Disassembler.

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This requires some gymnastics to make it available for C code. Remove the names
from the disassembler tables, making them relocation free.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150303 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2012-02-11 14:50:54 +00:00
parent b9d75a94dd
commit 953362cdfb
6 changed files with 38 additions and 16 deletions
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2
lib/Target/X86/Disassembler/LLVMBuild.txt
View File

@ -19,5 +19,5 @@
type = Library
name = X86Disassembler
parent = X86
required_libraries = MC Support X86Info
required_libraries = MC Support X86Desc X86Info
add_to_library_groups = X86

28
lib/Target/X86/Disassembler/X86Disassembler.cpp
View File

@ -21,6 +21,7 @@
#include "llvm/MC/MCDisassembler.h"
#include "llvm/MC/MCDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/MemoryObject.h"
@ -42,6 +43,11 @@ void x86DisassemblerDebug(const char *file,
dbgs() << file << ":" << line << ": " << s;
}
const char *x86DisassemblerGetInstrName(unsigned Opcode, void *mii) {
const MCInstrInfo *MII = static_cast<const MCInstrInfo *>(mii);
return MII->getName(Opcode);
}
#define debug(s) DEBUG(x86DisassemblerDebug(__FILE__, __LINE__, s));
namespace llvm {
@ -67,12 +73,13 @@ extern Target TheX86_32Target, TheX86_64Target;
static bool translateInstruction(MCInst &target,
InternalInstruction &source);
X86GenericDisassembler::X86GenericDisassembler(const MCSubtargetInfo &STI, DisassemblerMode mode) :
MCDisassembler(STI),
fMode(mode) {
}
X86GenericDisassembler::X86GenericDisassembler(const MCSubtargetInfo &STI,
DisassemblerMode mode,
const MCInstrInfo *MII)
: MCDisassembler(STI), MII(MII), fMode(mode) {}
X86GenericDisassembler::~X86GenericDisassembler() {
delete MII;
}
EDInstInfo *X86GenericDisassembler::getEDInfo() const {
@ -127,6 +134,7 @@ X86GenericDisassembler::getInstruction(MCInst &instr,
(void*)&region,
loggerFn,
(void*)&vStream,
(void*)MII,
address,
fMode);
@ -590,12 +598,16 @@ static bool translateInstruction(MCInst &mcInst,
return false;
}
static MCDisassembler *createX86_32Disassembler(const Target &T, const MCSubtargetInfo &STI) {
return new X86Disassembler::X86GenericDisassembler(STI, MODE_32BIT);
static MCDisassembler *createX86_32Disassembler(const Target &T,
const MCSubtargetInfo &STI) {
return new X86Disassembler::X86GenericDisassembler(STI, MODE_32BIT,
T.createMCInstrInfo());
}
static MCDisassembler *createX86_64Disassembler(const Target &T, const MCSubtargetInfo &STI) {
return new X86Disassembler::X86GenericDisassembler(STI, MODE_64BIT);
static MCDisassembler *createX86_64Disassembler(const Target &T,
const MCSubtargetInfo &STI) {
return new X86Disassembler::X86GenericDisassembler(STI, MODE_64BIT,
T.createMCInstrInfo());
}
extern "C" void LLVMInitializeX86Disassembler() {

5
lib/Target/X86/Disassembler/X86Disassembler.h
View File

@ -90,6 +90,7 @@
namespace llvm {
class MCInst;
class MCInstrInfo;
class MCSubtargetInfo;
class MemoryObject;
class raw_ostream;
@ -102,11 +103,13 @@ namespace X86Disassembler {
/// All each platform class should have to do is subclass the constructor, and
/// provide a different disassemblerMode value.
class X86GenericDisassembler : public MCDisassembler {
const MCInstrInfo *MII;
public:
/// Constructor - Initializes the disassembler.
///
/// @param mode - The X86 architecture mode to decode for.
X86GenericDisassembler(const MCSubtargetInfo &STI, DisassemblerMode mode);
X86GenericDisassembler(const MCSubtargetInfo &STI, DisassemblerMode mode,
const MCInstrInfo *MII);
private:
~X86GenericDisassembler();
public:

13
lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
View File

@ -712,7 +712,7 @@ static BOOL is16BitEquvalent(const char* orig, const char* equiv) {
* @return - 0 if the ModR/M could be read when needed or was not needed;
* nonzero otherwise.
*/
static int getID(struct InternalInstruction* insn) {
static int getID(struct InternalInstruction* insn, void *miiArg) {
uint8_t attrMask;
uint16_t instructionID;
@ -844,8 +844,12 @@ static int getID(struct InternalInstruction* insn) {
}
specWithOpsize = specifierForUID(instructionIDWithOpsize);
if (is16BitEquvalent(spec->name, specWithOpsize->name)) {
const char *specName = x86DisassemblerGetInstrName(instructionID, miiArg);
const char *specWithOpSizeSizeName =
x86DisassemblerGetInstrName(instructionIDWithOpsize, miiArg);
if (is16BitEquvalent(specName, specWithOpSizeSizeName)) {
insn->instructionID = instructionIDWithOpsize;
insn->spec = specWithOpsize;
} else {
@ -1608,6 +1612,7 @@ int decodeInstruction(struct InternalInstruction* insn,
void* readerArg,
dlog_t logger,
void* loggerArg,
void* miiArg,
uint64_t startLoc,
DisassemblerMode mode) {
memset(insn, 0, sizeof(struct InternalInstruction));
@ -1623,7 +1628,7 @@ int decodeInstruction(struct InternalInstruction* insn,
if (readPrefixes(insn) ||
readOpcode(insn) ||
getID(insn) ||
getID(insn, miiArg) ||
insn->instructionID == 0 ||
readOperands(insn))
return -1;

4
lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
View File

@ -21,7 +21,6 @@ extern "C" {
#endif
#define INSTRUCTION_SPECIFIER_FIELDS \
const char* name;
#define INSTRUCTION_IDS \
unsigned instructionIDs;
@ -554,6 +553,7 @@ int decodeInstruction(struct InternalInstruction* insn,
void* readerArg,
dlog_t logger,
void* loggerArg,
void* miiArg,
uint64_t startLoc,
DisassemblerMode mode);
@ -568,6 +568,8 @@ void x86DisassemblerDebug(const char *file,
unsigned line,
const char *s);
const char *x86DisassemblerGetInstrName(unsigned Opcode, void *mii);
#ifdef __cplusplus
}
#endif

2
utils/TableGen/X86DisassemblerTables.cpp
View File

@ -486,7 +486,7 @@ void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
i--;
o.indent(i * 2) << "}," << "\n";
o.indent(i * 2) << "\"" << InstructionSpecifiers[index].name << "\"";
o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */";
o << "\n";
i--;