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Preserve MachineMemOperands in ARMLoadStoreOptimizer.
Fixes PR8113. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144409 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -32,6 +32,7 @@
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SmallPtrSet.h"
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@ -1504,6 +1505,23 @@ static bool IsSafeAndProfitableToMove(bool isLd, unsigned Base,
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return AddedRegPressure.size() <= MemRegs.size() * 2;
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}
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/// Copy Op0 and Op1 operands into a new array assigned to MI.
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static void concatenateMemOperands(MachineInstr *MI, MachineInstr *Op0,
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MachineInstr *Op1) {
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assert(MI->memoperands_empty() && "expected a new machineinstr");
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size_t numMemRefs = (Op0->memoperands_end() - Op0->memoperands_begin())
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+ (Op1->memoperands_end() - Op1->memoperands_begin());
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MachineFunction *MF = MI->getParent()->getParent();
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MachineSDNode::mmo_iterator MemBegin = MF->allocateMemRefsArray(numMemRefs);
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MachineSDNode::mmo_iterator MemEnd =
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std::copy(Op0->memoperands_begin(), Op0->memoperands_end(), MemBegin);
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MemEnd =
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std::copy(Op1->memoperands_begin(), Op1->memoperands_end(), MemEnd);
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MI->setMemRefs(MemBegin, MemEnd);
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}
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bool
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ARMPreAllocLoadStoreOpt::CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1,
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DebugLoc &dl,
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@ -1698,6 +1716,8 @@ bool ARMPreAllocLoadStoreOpt::RescheduleOps(MachineBasicBlock *MBB,
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if (!isT2)
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MIB.addReg(0);
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MIB.addImm(Offset).addImm(Pred).addReg(PredReg);
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concatenateMemOperands(MIB, Op0, Op1);
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DEBUG(dbgs() << "Formed " << *MIB << "\n");
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++NumLDRDFormed;
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} else {
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MachineInstrBuilder MIB = BuildMI(*MBB, InsertPos, dl, MCID)
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@ -1710,6 +1730,8 @@ bool ARMPreAllocLoadStoreOpt::RescheduleOps(MachineBasicBlock *MBB,
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if (!isT2)
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MIB.addReg(0);
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MIB.addImm(Offset).addImm(Pred).addReg(PredReg);
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concatenateMemOperands(MIB, Op0, Op1);
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DEBUG(dbgs() << "Formed " << *MIB << "\n");
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++NumSTRDFormed;
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}
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MBB->erase(Op0);
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15
test/CodeGen/ARM/ldrd-memoper.ll
Normal file
15
test/CodeGen/ARM/ldrd-memoper.ll
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@ -0,0 +1,15 @@
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; RUN: llc %s -o /dev/null -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -debug-only=arm-ldst-opt 2> %t
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; RUN: FileCheck %s < %t
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; REQUIRES: asserts
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; PR8113: ARMLoadStoreOptimizer must preserve memoperands.
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@b = external global i64*
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; CHECK: Formed {{.*}} t2LDRD{{.*}} mem:LD4[%0] LD4[%0+4]
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define i64 @t(i64 %a) nounwind readonly {
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entry:
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%0 = load i64** @b, align 4
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%1 = load i64* %0, align 4
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%2 = mul i64 %1, %a
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ret i64 %2
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}
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