6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-22 09:29:31 +00:00
Code Issues Projects Releases Wiki Activity

Move function-live-in-handling code from the sdisel code to the scheduler.

Browse Source 
This code should be emitted after legalize, so it can't be in sdisel.

Note that the EmitFunctionEntryCode hook should be updated to operate on the
DAG.  The X86 backend is the only one currently using this hook.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28315 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-05-16 06:10:58 +00:00
parent 4e92027837
commit 966454129d
2 changed files with 15 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
View File

@ -539,6 +539,20 @@ void ScheduleDAG::EmitNoop() {
/// EmitSchedule - Emit the machine code in scheduled order.
void ScheduleDAG::EmitSchedule() {
// If this is the first basic block in the function, and if it has live ins
// that need to be copied into vregs, emit the copies into the top of the
// block before emitting the code for the block.
MachineFunction &MF = DAG.getMachineFunction();
if (&MF.front() == BB && MF.livein_begin() != MF.livein_end()) {
for (MachineFunction::livein_iterator LI = MF.livein_begin(),
E = MF.livein_end(); LI != E; ++LI)
if (LI->second)
MRI->copyRegToReg(*MF.begin(), MF.begin()->end(), LI->second,
LI->first, RegMap->getRegClass(LI->second));
}
// Finally, emit the code for all of the scheduled instructions.
std::map<SDNode*, unsigned> VRBaseMap;
for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
if (SUnit *SU = Sequence[i]) {

15
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
View File

@ -3150,24 +3150,11 @@ LowerArguments(BasicBlock *BB, SelectionDAGLowering &SDL,
}
}
// Next, if the function has live ins that need to be copied into vregs,
// emit the copies now, into the top of the block.
MachineFunction &MF = SDL.DAG.getMachineFunction();
if (MF.livein_begin() != MF.livein_end()) {
SSARegMap *RegMap = MF.getSSARegMap();
const MRegisterInfo &MRI = *MF.getTarget().getRegisterInfo();
for (MachineFunction::livein_iterator LI = MF.livein_begin(),
E = MF.livein_end(); LI != E; ++LI)
if (LI->second)
MRI.copyRegToReg(*MF.begin(), MF.begin()->end(), LI->second,
LI->first, RegMap->getRegClass(LI->second));
}
// Finally, if the target has anything special to do, allow it to do so.
// FIXME: this should insert code into the DAG!
EmitFunctionEntryCode(F, SDL.DAG.getMachineFunction());
}
void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB,
std::vector<std::pair<MachineInstr*, unsigned> > &PHINodesToUpdate,
FunctionLoweringInfo &FuncInfo) {