6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2026-04-26 12:20:42 +00:00
Code Issues Projects Releases Wiki Activity

Move ARM if-conversion before post-ra scheduling.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106355 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2010-06-18 23:32:07 +00:00
parent db4971259c
commit 96c3da6436
2 changed files with 3 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/Target/ARM/ARMTargetMachine.cpp
+2 -15
View File
@@ -27,11 +27,6 @@ EarlyITBlockFormation("thumb2-early-it-blocks", cl::Hidden,
cl::desc("Form IT blocks early before register allocation"),
cl::init(false));
static cl::opt<bool>
EarlyIfConvert("arm-early-if-convert", cl::Hidden,
cl::desc("Run if-conversion before post-ra scheduling"),
cl::init(false));
static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
Triple TheTriple(TT);
switch (TheTriple.getOS()) {
@@ -130,7 +125,7 @@ bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
// proper scheduling.
PM.add(createARMExpandPseudoPass());
if (EarlyIfConvert && OptLevel != CodeGenOpt::None) {
if (OptLevel != CodeGenOpt::None) {
if (!Subtarget.isThumb1Only())
PM.add(createIfConverterPass());
if (Subtarget.isThumb2())
@@ -142,16 +137,8 @@ bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
CodeGenOpt::Level OptLevel) {
if (!EarlyIfConvert && OptLevel != CodeGenOpt::None) {
if (!Subtarget.isThumb1Only())
PM.add(createIfConverterPass());
}
if (Subtarget.isThumb2()) {
if (!EarlyIfConvert)
PM.add(createThumb2ITBlockPass());
if (Subtarget.isThumb2())
PM.add(createThumb2SizeReductionPass());
}
PM.add(createARMConstantIslandPass());
return true;