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Corrected the descriptions of the llvm.writeport and llvm.writeio
intrinsics. Modified llvm.readio and llvm.writeio to use pointers to memory instead of integers. This should take care of problems such as different pointer sizes, casting integers to pointers, weird architectural pointer types, etc. Re-worded the description of llvm.readio and llvm.writeio so that it should be more clear as to why they should be used over regular loads/stores for I/O. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12867 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2077,13 +2077,13 @@ I/O port.
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<h5>Arguments:</h5>
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<p>
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The first argument to this intrinsic indicates the hardware I/O address to
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which data should be written. The address is in the hardware I/O address
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namespace (as opposed to being a memory location for memory mapped I/O).
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The first argument is the value to write to the I/O port.
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</p>
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<p>
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The second argument is the value to write to the I/O port.
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The second argument indicates the hardware I/O address to which data should be
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written. The address is in the hardware I/O address namespace (as opposed to
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being a memory location for memory mapped I/O).
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</p>
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<h5>Semantics:</h5>
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@ -2107,7 +2107,7 @@ value written must be 8, 16, or 32 bits in length.
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<h5>Syntax:</h5>
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<pre>
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call <integer type> (<integer type>)* %llvm.readio (<integer type> <address>)
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call <result> (<ty>*)* %llvm.readio (<ty> * <pointer>)
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</pre>
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<h5>Overview:</h5>
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@ -2120,24 +2120,28 @@ address.
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<h5>Arguments:</h5>
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<p>
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The argument to this intrinsic indicates the memory address from which to read
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the data.
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The argument to this intrinsic is a pointer indicating the memory address from
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which to read the data. The data must be a
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<a href="#t_firstclass">first class</a> type.
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</p>
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<h5>Semantics:</h5>
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<p>
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The '<tt>llvm.readio</tt>' intrinsic reads data from a memory mapped I/O
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location specified by <i>address</i> and returns the value. The address and
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return value must be integers, but the size allowed for each is dependent upon
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the platform upon which the program is code generated.
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location specified by <i>pointer</i> and returns the value. The argument must
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be a pointer, and the return value must be a
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<a href="#t_firstclass">first class</a> type. However, certain architectures
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may not support I/O on all first class types. For example, 32 bit processors
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may only support I/O on data types that are 32 bits or less.
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</p>
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<p>
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This intrinsic ensures that the I/O data read occurs in instruction order in
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relation to other I/O data reads and writes (as opposed to a normal load, where
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hardware scheduling can re-arrange the actual memory accesses to occur out of
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order).
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This intrinsic enforces an in-order memory model for llvm.readio and
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llvm.writeio calls on machines that use dynamic scheduling. Dynamically
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scheduled processors may execute loads and stores out of order, re-ordering at
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run time accesses to memory mapped I/O registers. Using these intrinsics
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ensures that accesses to memory mapped I/O registers occur in program order.
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</p>
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</div>
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@ -2151,7 +2155,7 @@ order).
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<h5>Syntax:</h5>
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<pre>
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call void (<integer type>, <integer type>)* %llvm.writeio (<integer type> <value>, <integer type> <address>)
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call void (<ty1>, <ty2>*)* %llvm.writeio (<ty1> <value>, <ty2> * <pointer>)
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</pre>
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<h5>Overview:</h5>
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@ -2164,28 +2168,27 @@ mapped I/O address.
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<h5>Arguments:</h5>
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<p>
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The first argument to this intrinsic indicates the memory address to which data
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should be written.
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</p>
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<p>
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The second argument is the value to write to the memory mapped I/O location.
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The first argument is the value to write to the memory mapped I/O location.
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The second argument is a pointer indicating the memory address to which the
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data should be written.
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</p>
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<h5>Semantics:</h5>
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<p>
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The '<tt>llvm.writeio</tt>' intrinsic writes <i>value</i> to the memory mapped
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I/O address specified by <i>address</i>. The address and value must be
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integers, but the size is dependent upon the platform upon which the program is
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code generated.
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I/O address specified by <i>pointer</i>. The value must be a
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<a href="#t_firstclass">first class</a> type. However, certain architectures
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may not support I/O on all first class types. For example, 32 bit processors
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may only support I/O on data types that are 32 bits or less.
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</p>
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<p>
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This intrinsic ensures that the I/O data write occurs in instruction order in
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relation to other I/O data reads and writes (as opposed to a normal store,
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where hardware scheduling can re-arrange the actual memory accesses to occur
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out of order).
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This intrinsic enforces an in-order memory model for llvm.readio and
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llvm.writeio calls on machines that use dynamic scheduling. Dynamically
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scheduled processors may execute loads and stores out of order, re-ordering at
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run time accesses to memory mapped I/O registers. Using these intrinsics
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ensures that accesses to memory mapped I/O registers occur in program order.
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</p>
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</div>
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