6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-19 03:29:22 +00:00
Code Issues Projects Releases Wiki Activity

Fix opcode: no immediate in an `or r1, r2, r3' (all registers) instr.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14411 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman 2004-06-25 18:36:53 +00:00
parent f5076133a9
commit 972569a22f
2 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/PowerPC/PPC32ISelSimple.cpp
View File

@ -1052,7 +1052,7 @@ void ISel::promote32(unsigned targetReg, const ValueRecord &VR) {
break;
case cInt:
// Move value into target register (32->32)
BuildMI(BB, PPC32::ORI, 2, targetReg).addReg(Reg).addReg(Reg);
BuildMI(BB, PPC32::OR, 2, targetReg).addReg(Reg).addReg(Reg);
break;
default:
assert(0 && "Unpromotable operand class in promote32");

2
lib/Target/PowerPC/PowerPCISelSimple.cpp
View File

@ -1052,7 +1052,7 @@ void ISel::promote32(unsigned targetReg, const ValueRecord &VR) {
break;
case cInt:
// Move value into target register (32->32)
BuildMI(BB, PPC32::ORI, 2, targetReg).addReg(Reg).addReg(Reg);
BuildMI(BB, PPC32::OR, 2, targetReg).addReg(Reg).addReg(Reg);
break;
default:
assert(0 && "Unpromotable operand class in promote32");