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[X86] Make fxsave64/fxrstor64/xsave64/xsrstor64/xsaveopt64 parseable in AT&T syntax. Also make them the default output.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227963 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2015-02-03 11:03:57 +00:00
parent c7f2036c2b
commit 97494e9718
6 changed files with 26 additions and 12 deletions
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4
lib/Target/X86/X86InstrFPStack.td
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@ -636,12 +636,12 @@ def FCOMPP : I<0xDE, MRM_D9, (outs), (ins), "fcompp", [], IIC_FCOMPP>;
def FXSAVE : I<0xAE, MRM0m, (outs opaque512mem:$dst), (ins),
"fxsave\t$dst", [], IIC_FXSAVE>, TB;
def FXSAVE64 : RI<0xAE, MRM0m, (outs opaque512mem:$dst), (ins),
"fxsave{q|64}\t$dst", [], IIC_FXSAVE>, TB,
"fxsave64\t$dst", [], IIC_FXSAVE>, TB,
Requires<[In64BitMode]>;
def FXRSTOR : I<0xAE, MRM1m, (outs), (ins opaque512mem:$src),
"fxrstor\t$src", [], IIC_FXRSTOR>, TB;
def FXRSTOR64 : RI<0xAE, MRM1m, (outs), (ins opaque512mem:$src),
"fxrstor{q|64}\t$src", [], IIC_FXRSTOR>, TB,
"fxrstor64\t$src", [], IIC_FXRSTOR>, TB,
Requires<[In64BitMode]>;
} // SchedRW

6
lib/Target/X86/X86InstrInfo.td
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@ -2564,6 +2564,12 @@ def : MnemonicAlias<"fnstsww", "fnstsw", "att">;
def : MnemonicAlias<"fucomip", "fucompi", "att">;
def : MnemonicAlias<"fwait", "wait">;
def : MnemonicAlias<"fxsaveq", "fxsave64", "att">;
def : MnemonicAlias<"fxrstorq", "fxrstor64", "att">;
def : MnemonicAlias<"xsaveq", "xsave64", "att">;
def : MnemonicAlias<"xrstorq", "xrstor64", "att">;
def : MnemonicAlias<"xsaveoptq", "xsaveopt64", "att">;
class CondCodeAlias<string Prefix,string Suffix, string OldCond, string NewCond,
string VariantName>

6
lib/Target/X86/X86InstrSystem.td
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@ -486,15 +486,15 @@ let Uses = [RDX, RAX] in {
def XSAVE : I<0xAE, MRM4m, (outs opaque512mem:$dst), (ins),
"xsave\t$dst", []>, TB;
def XSAVE64 : RI<0xAE, MRM4m, (outs opaque512mem:$dst), (ins),
"xsave{q|64}\t$dst", []>, TB, Requires<[In64BitMode]>;
"xsave64\t$dst", []>, TB, Requires<[In64BitMode]>;
def XRSTOR : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
"xrstor\t$dst", []>, TB;
def XRSTOR64 : RI<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
"xrstor{q|64}\t$dst", []>, TB, Requires<[In64BitMode]>;
"xrstor64\t$dst", []>, TB, Requires<[In64BitMode]>;
def XSAVEOPT : I<0xAE, MRM6m, (outs opaque512mem:$dst), (ins),
"xsaveopt\t$dst", []>, TB;
def XSAVEOPT64 : RI<0xAE, MRM6m, (outs opaque512mem:$dst), (ins),
"xsaveopt{q|64}\t$dst", []>, TB, Requires<[In64BitMode]>;
"xsaveopt64\t$dst", []>, TB, Requires<[In64BitMode]>;
}
} // SchedRW

6
test/MC/Disassembler/X86/x86-64.txt
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@ -116,13 +116,13 @@
# CHECK: xabort $13
0xc6 0xf8 0x0d
# CHECK: xsaveq (%rax)
# CHECK: xsave64 (%rax)
0x48 0x0f 0xae 0x20
# CHECK: xrstorq (%rax)
# CHECK: xrstor64 (%rax)
0x48 0x0f 0xae 0x28
# CHECK: xsaveoptq (%rax)
# CHECK: xsaveopt64 (%rax)
0x48 0x0f 0xae 0x30
# CHECK: clac

4
test/MC/X86/intel-syntax.s
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@ -586,8 +586,8 @@ fdiv ST(1)
fdivr ST(1)
// CHECK: fxsaveq (%rax)
// CHECK: fxrstorq (%rax)
// CHECK: fxsave64 (%rax)
// CHECK: fxrstor64 (%rax)
fxsave64 opaque ptr [rax]
fxrstor64 opaque ptr [rax]

12
test/MC/X86/x86_64-encoding.s
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@ -200,14 +200,22 @@ sha256msg2 (%rax), %xmm2
// CHECK: encoding: [0x48,0x8b,0x04,0xe1]
movq (%rcx,%riz,8), %rax
// CHECK: fxsaveq (%rax)
// CHECK: fxsave64 (%rax)
// CHECK: encoding: [0x48,0x0f,0xae,0x00]
fxsaveq (%rax)
// CHECK: fxrstorq (%rax)
// CHECK: fxsave64 (%rax)
// CHECK: encoding: [0x48,0x0f,0xae,0x00]
fxsave64 (%rax)
// CHECK: fxrstor64 (%rax)
// CHECK: encoding: [0x48,0x0f,0xae,0x08]
fxrstorq (%rax)
// CHECK: fxrstor64 (%rax)
// CHECK: encoding: [0x48,0x0f,0xae,0x08]
fxrstor64 (%rax)
// CHECK: leave
// CHECK: encoding: [0xc9]
leave