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Replace copyRegToReg with copyPhysReg for Alpha.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108065 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-07-11 01:08:23 +00:00
parent 38da927703
commit 99666a3429
2 changed files with 15 additions and 28 deletions
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33
lib/Target/Alpha/AlphaInstrInfo.cpp
View File

@ -141,36 +141,25 @@ unsigned AlphaInstrInfo::InsertBranch(MachineBasicBlock &MBB,
return 2;
}
bool AlphaInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *DestRC,
const TargetRegisterClass *SrcRC,
DebugLoc DL) const {
//cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
if (DestRC != SrcRC) {
// Not yet supported!
return false;
}
if (DestRC == Alpha::GPRCRegisterClass) {
void AlphaInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, DebugLoc DL,
unsigned DestReg, unsigned SrcReg,
bool KillSrc) const {
if (Alpha::GPRCRegClass.contains(DestReg, SrcReg)) {
BuildMI(MBB, MI, DL, get(Alpha::BISr), DestReg)
.addReg(SrcReg)
.addReg(SrcReg);
} else if (DestRC == Alpha::F4RCRegisterClass) {
.addReg(SrcReg, getKillRegState(KillSrc));
} else if (Alpha::F4RCRegClass.contains(DestReg, SrcReg)) {
BuildMI(MBB, MI, DL, get(Alpha::CPYSS), DestReg)
.addReg(SrcReg)
.addReg(SrcReg);
} else if (DestRC == Alpha::F8RCRegisterClass) {
.addReg(SrcReg, getKillRegState(KillSrc));
} else if (Alpha::F8RCRegClass.contains(DestReg, SrcReg)) {
BuildMI(MBB, MI, DL, get(Alpha::CPYST), DestReg)
.addReg(SrcReg)
.addReg(SrcReg);
.addReg(SrcReg, getKillRegState(KillSrc));
} else {
// Attempt to copy register that is not GPR or FPR
return false;
llvm_unreachable("Attempt to copy register that is not GPR or FPR");
}
return true;
}
void

10
lib/Target/Alpha/AlphaInstrInfo.h
View File

@ -45,12 +45,10 @@ public:
MachineBasicBlock *FBB,
const SmallVectorImpl<MachineOperand> &Cond,
DebugLoc DL) const;
virtual bool copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *DestRC,
const TargetRegisterClass *SrcRC,
DebugLoc DL) const;
virtual void copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, DebugLoc DL,
unsigned DestReg, unsigned SrcReg,
bool KillSrc) const;
virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
unsigned SrcReg, bool isKill, int FrameIndex,