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don't bother making x&-1 only to simplify it in dag combine. This commonly occurs expanding i64 ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46383 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1877,6 +1877,8 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
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// worth handling here.
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if (N2C && N2C->getValue() == 0)
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return N2;
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if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
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return N1;
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break;
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case ISD::OR:
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case ISD::XOR:
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