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[mips] Compute stack alignment on the fly.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193673 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2013-10-30 02:29:43 +00:00
parent 62406fdc6f
commit 99a43d3b8f
3 changed files with 3 additions and 7 deletions
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4
lib/Target/Mips/Mips.td
View File

@ -30,12 +30,10 @@ def MipsInstrInfo : InstrInfo;
// Mips Subtarget features //
//===----------------------------------------------------------------------===//
def StackAlign16 : SubtargetFeature<"stackalign16", "StackAlignment", "16",
"Set stack alignment to 16-bytes.">;
def FeatureGP64Bit : SubtargetFeature<"gp64", "IsGP64bit", "true",
"General Purpose Registers are 64-bit wide.">;
def FeatureFP64Bit : SubtargetFeature<"fp64", "IsFP64bit", "true",
"Support 64-bit FP registers.", [StackAlign16]>;
"Support 64-bit FP registers.">;
def FeatureSingleFloat : SubtargetFeature<"single-float", "IsSingleFloat",
"true", "Only supports single precision float">;
def FeatureO32 : SubtargetFeature<"o32", "MipsABI", "O32",

2
lib/Target/Mips/MipsSubtarget.cpp
View File

@ -72,7 +72,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
InMips16Mode(false), InMips16HardFloat(Mips16HardFloat),
InMicroMipsMode(false), HasDSP(false), HasDSPR2(false),
AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), HasMSA(false),
StackAlignment(8), RM(_RM), OverrideMode(NoOverride), TM(_TM)
RM(_RM), OverrideMode(NoOverride), TM(_TM)
{
std::string CPUName = CPU;
if (CPUName.empty())

4
lib/Target/Mips/MipsSubtarget.h
View File

@ -116,8 +116,6 @@ protected:
// HasMSA -- supports MSA ASE.
bool HasMSA;
unsigned StackAlignment;
InstrItineraryData InstrItins;
// The instance to the register info section object
@ -219,7 +217,7 @@ public:
//
static bool useConstantIslands();
unsigned stackAlignment() const { return StackAlignment; }
unsigned stackAlignment() const { return isFP64bit() ? 16 : 8; }
// Grab MipsRegInfo object
const MipsReginfo &getMReginfo() const { return MRI; }