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[ms-inline asm] Add a few typedefs to simplify future changes.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165324 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier
2012-10-05 18:41:14 +00:00
parent dfb8dbb4fd
commit 9ba9d4d76b
6 changed files with 24 additions and 19 deletions
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include/llvm/MC/MCTargetAsmParser.h
+6 -2
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@@ -50,6 +50,10 @@ public:
virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
SMLoc &EndLoc) = 0;
typedef std::pair< unsigned, std::string > MapAndConstraint;
typedef SmallVector<MapAndConstraint, 4> MatchInstMapAndConstraints;
typedef SmallVectorImpl<MapAndConstraint> MatchInstMapAndConstraintsImpl;
/// ParseInstruction - Parse one assembly instruction.
///
/// The parser is positioned following the instruction name. The target
@@ -92,7 +96,7 @@ public:
MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out, unsigned &Kind, unsigned &Opcode,
SmallVectorImpl<std::pair< unsigned, std::string > > &MapAndConstraints,
MatchInstMapAndConstraintsImpl &MapAndConstraints,
unsigned &OrigErrorInfo, bool matchingInlineAsm = false) {
OrigErrorInfo = ~0x0;
return true;
@@ -117,7 +121,7 @@ public:
virtual void convertToMapAndConstraints(unsigned Kind,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
SmallVectorImpl<std::pair< unsigned, std::string > > &MapAndConstraints) = 0;
MatchInstMapAndConstraintsImpl &MapAndConstraints) = 0;
};
} // End llvm namespace
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+1 -1
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@@ -7480,7 +7480,7 @@ MatchAndEmitInstruction(SMLoc IDLoc,
unsigned Kind;
unsigned ErrorInfo;
unsigned MatchResult;
SmallVector<std::pair< unsigned, std::string >, 4> MapAndConstraints;
MatchInstMapAndConstraints MapAndConstraints;
MatchResult = MatchInstructionImpl(Operands, Kind, Inst,
MapAndConstraints, ErrorInfo,
/*matchingInlineAsm*/ false);
lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp
+1 -1
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@@ -318,7 +318,7 @@ MatchAndEmitInstruction(SMLoc IDLoc,
MCInst Inst;
unsigned Kind;
unsigned ErrorInfo;
SmallVector<std::pair< unsigned, std::string >, 4> MapAndConstraints;
MatchInstMapAndConstraints MapAndConstraints;
switch (MatchInstructionImpl(Operands, Kind, Inst, MapAndConstraints,
ErrorInfo, /*matchingInlineAsm*/ false)) {
default: break;
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+1 -1
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@@ -371,7 +371,7 @@ MatchAndEmitInstruction(SMLoc IDLoc,
MCInst Inst;
unsigned Kind;
unsigned ErrorInfo;
SmallVector<std::pair< unsigned, std::string >, 4> MapAndConstraints;
MatchInstMapAndConstraints MapAndConstraints;
unsigned MatchResult = MatchInstructionImpl(Operands, Kind, Inst,
MapAndConstraints, ErrorInfo,
/*matchingInlineAsm*/ false);
lib/Target/X86/AsmParser/X86AsmParser.cpp
+3 -3
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@@ -69,7 +69,7 @@ private:
bool MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out, unsigned &Kind, unsigned &Opcode,
SmallVectorImpl<std::pair< unsigned, std::string > > &MapAndConstraints,
MatchInstMapAndConstraintsImpl &MapAndConstraints,
unsigned &OrigErrorInfo, bool matchingInlineAsm = false);
/// isSrcOp - Returns true if operand is either (%rsi) or %ds:%(rsi)
@@ -1526,7 +1526,7 @@ MatchAndEmitInstruction(SMLoc IDLoc,
unsigned Kind;
unsigned Opcode;
unsigned ErrorInfo;
SmallVector<std::pair< unsigned, std::string >, 4> MapAndConstraints;
MatchInstMapAndConstraints MapAndConstraints;
bool Error = MatchInstruction(IDLoc, Operands, Out, Kind, Opcode,
MapAndConstraints, ErrorInfo);
return Error;
@@ -1631,7 +1631,7 @@ MatchInstruction(SMLoc IDLoc,
unsigned Match1, Match2, Match3, Match4;
unsigned tKind;
SmallVector<std::pair< unsigned, std::string >, 4> tMapAndConstraints[4];
MatchInstMapAndConstraints tMapAndConstraints[4];
Match1 = MatchInstructionImpl(Operands, tKind, Inst, tMapAndConstraints[0],
ErrorInfoIgnore, isParsingIntelSyntax());
if (Match1 == Match_Success) Kind = tKind;
utils/TableGen/AsmMatcherEmitter.cpp
+12 -11
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@@ -1716,9 +1716,9 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
OpOS << "void " << Target.getName() << ClassName << "::\n"
<< "convertToMapAndConstraints(unsigned Kind,\n";
OpOS.indent(27);
OpOS << "const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n"
<< " SmallVectorImpl<std::pair< unsigned, std::string > >"
<< " &MapAndConstraints) {\n"
OpOS << "const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n";
OpOS.indent(27);
OpOS << "MatchInstMapAndConstraintsImpl &MapAndConstraints) {\n"
<< " assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n"
<< " unsigned NumMCOperands = 0;\n"
<< " const uint8_t *Converter = ConversionTable[Kind];\n"
@@ -2606,15 +2606,16 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
<< " const SmallVectorImpl<MCParsedAsmOperand*> "
<< "&Operands);\n";
OS << " void convertToMapAndConstraints(unsigned Kind,\n ";
OS << " const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n"
<< " SmallVectorImpl<std::pair< unsigned, std::string > >"
<< " &MapAndConstraints);\n";
OS << " const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n";
OS.indent(29);
OS << "MatchInstMapAndConstraintsImpl &MapAndConstraints);\n";
OS << " bool mnemonicIsValid(StringRef Mnemonic);\n";
OS << " unsigned MatchInstructionImpl(\n"
<< " const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n"
<< " unsigned &Kind, MCInst &Inst,\n"
<< " SmallVectorImpl<std::pair< unsigned, std::string > > "
<< "&MapAndConstraints,\n"
OS << " unsigned MatchInstructionImpl(\n";
OS.indent(27);
OS << "const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n"
<< " unsigned &Kind, MCInst &Inst,\n";
OS.indent(30);
OS << "MatchInstMapAndConstraintsImpl &MapAndConstraints,\n"
<< " unsigned &ErrorInfo,"
<< " bool matchingInlineAsm,\n"
<< " unsigned VariantID = 0);\n";