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Add a blurb about the new LSR.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102126 91177308-0d34-0410-b5e6-96231b3b80d8
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Dan Gohman 2010-04-22 20:50:43 +00:00
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@ -657,7 +657,8 @@ it run faster:</p>
understand assembly files. This is wired up in llvm-gcc and clang to
the <tt>-fverbose-asm</tt> option.</li>
<li>New LSR with "full strength reduction" mode. FIXME: Description?</li>
<li>New LSR with "full strength reduction" mode, which can reduce address
register pressure in loops where address generation is important.</li>
<li>A new codegen level Common Subexpression Elimination pass (MachineCSE)
is available and enabled by default. It catches redundancies exposed by