mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-20 14:29:27 +00:00
Move pass configuration out of pass constructors: MachineLICM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150099 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
9f17cf625d
commit
9d41bd5c78
@ -93,6 +93,7 @@ public:
|
||||
/// Add the complete, standard set of LLVM CodeGen passes.
|
||||
/// Fully developed targets will not generally override this.
|
||||
virtual void addMachinePasses();
|
||||
|
||||
protected:
|
||||
// Helper to verify the analysis is really immutable.
|
||||
void setOpt(bool &Opt, bool Val);
|
||||
@ -323,7 +324,7 @@ namespace llvm {
|
||||
|
||||
/// createMachineLICMPass - This pass performs LICM on machine instructions.
|
||||
///
|
||||
FunctionPass *createMachineLICMPass(bool PreRegAlloc = true);
|
||||
FunctionPass *createMachineLICMPass();
|
||||
|
||||
/// createMachineSinkingPass - This pass performs sinking on machine
|
||||
/// instructions.
|
||||
|
@ -60,8 +60,6 @@ STATISTIC(NumPostRAHoisted,
|
||||
|
||||
namespace {
|
||||
class MachineLICM : public MachineFunctionPass {
|
||||
bool PreRegAlloc;
|
||||
|
||||
const TargetMachine *TM;
|
||||
const TargetInstrInfo *TII;
|
||||
const TargetLowering *TLI;
|
||||
@ -69,6 +67,7 @@ namespace {
|
||||
const MachineFrameInfo *MFI;
|
||||
MachineRegisterInfo *MRI;
|
||||
const InstrItineraryData *InstrItins;
|
||||
bool PreRegAlloc;
|
||||
|
||||
// Various analyses that we use...
|
||||
AliasAnalysis *AA; // Alias analysis info.
|
||||
@ -298,8 +297,8 @@ INITIALIZE_AG_DEPENDENCY(AliasAnalysis)
|
||||
INITIALIZE_PASS_END(MachineLICM, "machinelicm",
|
||||
"Machine Loop Invariant Code Motion", false, false)
|
||||
|
||||
FunctionPass *llvm::createMachineLICMPass(bool PreRegAlloc) {
|
||||
return new MachineLICM(PreRegAlloc);
|
||||
FunctionPass *llvm::createMachineLICMPass() {
|
||||
return new MachineLICM();
|
||||
}
|
||||
|
||||
/// LoopIsOuterMostWithPredecessor - Test if the given loop is the outer-most
|
||||
@ -332,6 +331,8 @@ bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
|
||||
MRI = &MF.getRegInfo();
|
||||
InstrItins = TM->getInstrItineraryData();
|
||||
|
||||
PreRegAlloc = MRI->isSSA();
|
||||
|
||||
if (PreRegAlloc) {
|
||||
// Estimate register pressure during pre-regalloc pass.
|
||||
unsigned NumRC = TRI->getNumRegClasses();
|
||||
|
@ -244,7 +244,7 @@ void TargetPassConfig::addMachinePasses() {
|
||||
|
||||
// Run post-ra machine LICM to hoist reloads / remats.
|
||||
if (!DisablePostRAMachineLICM)
|
||||
PM.add(createMachineLICMPass(false));
|
||||
PM.add(createMachineLICMPass());
|
||||
|
||||
printAndVerify("After StackSlotColoring and postra Machine LICM");
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user