Move pass configuration out of pass constructors: MachineLICM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150099 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick
2012-02-08 21:23:03 +00:00
parent 9f17cf625d
commit 9d41bd5c78
3 changed files with 8 additions and 6 deletions
+5 -4
View File
@@ -60,8 +60,6 @@ STATISTIC(NumPostRAHoisted,
namespace {
class MachineLICM : public MachineFunctionPass {
bool PreRegAlloc;
const TargetMachine *TM;
const TargetInstrInfo *TII;
const TargetLowering *TLI;
@@ -69,6 +67,7 @@ namespace {
const MachineFrameInfo *MFI;
MachineRegisterInfo *MRI;
const InstrItineraryData *InstrItins;
bool PreRegAlloc;
// Various analyses that we use...
AliasAnalysis *AA; // Alias analysis info.
@@ -298,8 +297,8 @@ INITIALIZE_AG_DEPENDENCY(AliasAnalysis)
INITIALIZE_PASS_END(MachineLICM, "machinelicm",
"Machine Loop Invariant Code Motion", false, false)
FunctionPass *llvm::createMachineLICMPass(bool PreRegAlloc) {
return new MachineLICM(PreRegAlloc);
FunctionPass *llvm::createMachineLICMPass() {
return new MachineLICM();
}
/// LoopIsOuterMostWithPredecessor - Test if the given loop is the outer-most
@@ -332,6 +331,8 @@ bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
MRI = &MF.getRegInfo();
InstrItins = TM->getInstrItineraryData();
PreRegAlloc = MRI->isSSA();
if (PreRegAlloc) {
// Estimate register pressure during pre-regalloc pass.
unsigned NumRC = TRI->getNumRegClasses();