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R600: Improve asmPrint of ALU clause
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180957 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -198,4 +198,16 @@ void AMDGPUInstPrinter::printBankSwizzle(const MCInst *MI, unsigned OpNo,
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return;
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}
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void AMDGPUInstPrinter::printKCache(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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int KCacheMode = MI->getOperand(OpNo).getImm();
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if (KCacheMode > 0) {
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int KCacheBank = MI->getOperand(OpNo - 2).getImm();
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O << "CB" << KCacheBank <<":";
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int KCacheAddr = MI->getOperand(OpNo + 2).getImm();
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int LineSize = (KCacheMode == 1)?16:32;
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O << KCacheAddr * 16 << "-" << KCacheAddr * 16 + LineSize;
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}
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}
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#include "AMDGPUGenAsmWriter.inc"
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@ -49,6 +49,7 @@ private:
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void printWrite(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printSel(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printBankSwizzle(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printKCache(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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};
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} // End namespace llvm
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@ -815,12 +815,15 @@ class CF_ALU_WORD1 {
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let Word1{31} = BARRIER;
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}
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def KCACHE : InstFlag<"printKCache">;
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class ALU_CLAUSE<bits<4> inst, string OpName> : AMDGPUInst <(outs),
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(ins i32imm:$ADDR, i32imm:$KCACHE_BANK0, i32imm:$KCACHE_BANK1, i32imm:$KCACHE_MODE0, i32imm:$KCACHE_MODE1,
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i32imm:$KCACHE_ADDR0, i32imm:$KCACHE_ADDR1, i32imm:$COUNT),
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(ins i32imm:$ADDR, i32imm:$KCACHE_BANK0, i32imm:$KCACHE_BANK1,
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KCACHE:$KCACHE_MODE0, KCACHE:$KCACHE_MODE1,
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i32imm:$KCACHE_ADDR0, i32imm:$KCACHE_ADDR1,
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i32imm:$COUNT),
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!strconcat(OpName, " $COUNT, @$ADDR, "
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"KC0[CB$KCACHE_BANK0:$KCACHE_ADDR0-$KCACHE_ADDR0+32]"
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", KC1[CB$KCACHE_BANK1:$KCACHE_ADDR1-$KCACHE_ADDR1+32]"),
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"KC0[$KCACHE_MODE0], KC1[$KCACHE_MODE1]"),
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[] >, CF_ALU_WORD0, CF_ALU_WORD1 {
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field bits<64> Inst;
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