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Revert "Added inst combine transforms for single bit tests from Chris's note"
This reverts commit r210006, it miscompiled libapr which is used in who knows how many projects. A test has been added to ensure that we don't regress again. I'll work on a rewrite of what the optimization was trying to do later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222856 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -389,15 +389,7 @@ static Value *SimplifyWithOpReplaced(Value *V, Value *Op, Value *RepOp,
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/// 1. The icmp predicate is inverted
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/// 2. The select operands are reversed
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/// 3. The magnitude of C2 and C1 are flipped
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///
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/// This also tries to turn
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/// --- Single bit tests:
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/// if ((x & C) == 0) x |= C to x |= C
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/// if ((x & C) != 0) x ^= C to x &= ~C
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/// if ((x & C) == 0) x ^= C to x |= C
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/// if ((x & C) != 0) x &= ~C to x &= ~C
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/// if ((x & C) == 0) x &= ~C to nothing
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static Value *foldSelectICmpAndOr(SelectInst &SI, Value *TrueVal,
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static Value *foldSelectICmpAndOr(const SelectInst &SI, Value *TrueVal,
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Value *FalseVal,
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InstCombiner::BuilderTy *Builder) {
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const ICmpInst *IC = dyn_cast<ICmpInst>(SI.getCondition());
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@ -416,25 +408,6 @@ static Value *foldSelectICmpAndOr(SelectInst &SI, Value *TrueVal,
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return nullptr;
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const APInt *C2;
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if (match(TrueVal, m_Specific(X))) {
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// if ((X & C) != 0) X ^= C becomes X &= ~C
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if (match(FalseVal, m_Xor(m_Specific(X), m_APInt(C2))) && C1 == C2)
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return Builder->CreateAnd(X, ~(*C1));
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// if ((X & C) != 0) X &= ~C becomes X &= ~C
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if (match(FalseVal, m_And(m_Specific(X), m_APInt(C2))) && *C1 == ~(*C2))
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return FalseVal;
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} else if (match(FalseVal, m_Specific(X))) {
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// if ((X & C) == 0) X ^= C becomes X |= C
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if (match(TrueVal, m_Xor(m_Specific(X), m_APInt(C2))) && C1 == C2)
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return Builder->CreateOr(X, *C1);
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// if ((X & C) == 0) X &= ~C becomes nothing
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if (match(TrueVal, m_And(m_Specific(X), m_APInt(C2))) && *C1 == ~(*C2))
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return X;
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// if ((X & C) == 0) X |= C becomes X |= C
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if (match(TrueVal, m_Or(m_Specific(X), m_APInt(C2))) && C1 == C2)
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return TrueVal;
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}
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bool OrOnTrueVal = false;
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bool OrOnFalseVal = match(FalseVal, m_Or(m_Specific(TrueVal), m_Power2(C2)));
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if (!OrOnFalseVal)
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@ -997,111 +997,6 @@ define <2 x i32> @select_icmp_eq_and_1_0_or_vector_of_2s(i32 %x, <2 x i32> %y) {
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ret <2 x i32> %select
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}
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; CHECK-LABEL: @select_icmp_and_8_eq_0_or_8(
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; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, 8
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; CHECK-NEXT: ret i32 [[OR]]
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define i32 @select_icmp_and_8_eq_0_or_8(i32 %x) {
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%or = or i32 %x, 8
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%or.x = select i1 %cmp, i32 %or, i32 %x
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ret i32 %or.x
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}
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; CHECK-LABEL: @select_icmp_and_8_ne_0_xor_8(
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; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, -9
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; CHECK-NEXT: ret i32 [[AND]]
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define i32 @select_icmp_and_8_ne_0_xor_8(i32 %x) {
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%xor = xor i32 %x, 8
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%x.xor = select i1 %cmp, i32 %x, i32 %xor
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ret i32 %x.xor
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}
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; CHECK-LABEL: @select_icmp_and_8_eq_0_xor_8(
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; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, 8
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; CHECK-NEXT: ret i32 [[OR]]
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define i32 @select_icmp_and_8_eq_0_xor_8(i32 %x) {
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%xor = xor i32 %x, 8
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%xor.x = select i1 %cmp, i32 %xor, i32 %x
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ret i32 %xor.x
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}
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; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8(
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; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, -9
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; CHECK-NEXT: ret i32 [[AND]]
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define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) {
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%and1 = and i32 %x, -9
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%x.and1 = select i1 %cmp, i32 %x, i32 %and1
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ret i32 %x.and1
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}
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; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8(
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; CHECK-NEXT: ret i32 %x
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define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) {
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%and1 = and i32 %x, -9
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%and1.x = select i1 %cmp, i32 %and1, i32 %x
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ret i32 %and1.x
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}
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; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_xor_8(
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; CHECK: select i1 %cmp, i64 %y, i64 %xor
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define i64 @select_icmp_x_and_8_eq_0_y_xor_8(i32 %x, i64 %y) {
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%xor = xor i64 %y, 8
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%y.xor = select i1 %cmp, i64 %y, i64 %xor
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ret i64 %y.xor
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}
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; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_and_not_8(
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; CHECK: select i1 %cmp, i64 %y, i64 %and1
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define i64 @select_icmp_x_and_8_eq_0_y_and_not_8(i32 %x, i64 %y) {
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%and1 = and i64 %y, -9
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%y.and1 = select i1 %cmp, i64 %y, i64 %and1
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ret i64 %y.and1
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}
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; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_xor_8(
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; CHECK: select i1 %cmp, i64 %xor, i64 %y
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define i64 @select_icmp_x_and_8_ne_0_y_xor_8(i32 %x, i64 %y) {
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%xor = xor i64 %y, 8
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%xor.y = select i1 %cmp, i64 %xor, i64 %y
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ret i64 %xor.y
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}
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; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_and_not_8(
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; CHECK: select i1 %cmp, i64 %and1, i64 %y
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define i64 @select_icmp_x_and_8_ne_0_y_and_not_8(i32 %x, i64 %y) {
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%and1 = and i64 %y, -9
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%and1.y = select i1 %cmp, i64 %and1, i64 %y
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ret i64 %and1.y
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}
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; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_or_8(
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; CHECK: xor i64 %1, 8
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; CHECK: or i64 %2, %y
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define i64 @select_icmp_x_and_8_ne_0_y_or_8(i32 %x, i64 %y) {
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%or = or i64 %y, 8
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%or.y = select i1 %cmp, i64 %or, i64 %y
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ret i64 %or.y
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}
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define i32 @test65(i64 %x) {
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%1 = and i64 %x, 16
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%2 = icmp ne i64 %1, 0
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@ -1491,3 +1386,13 @@ entry:
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%v = load i128* %p
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ret i128 %v
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}
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define i32 @test87(i32 %x) {
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%and = and i32 %x, 1
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%cmp = icmp ne i32 %and, 0
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%and1 = and i32 %x, -2
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%and1.x = select i1 %cmp, i32 %and1, i32 %x
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ret i32 %and1.x
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; CHECK-LABEL: @test87(
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; CHECK: and i32 %x, -2
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}
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