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Change this so that LLC actually tries to run the code generator, though it will
immediately abort due to lack of an instruction selector. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11963 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -45,7 +45,7 @@ bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
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PM.add(createPrologEpilogCodeInserter());
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// <insert assembly code output passes here>
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PM.add(createMachineCodeDeleter());
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return true; // change to `return false' when this actually works.
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return false;
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}
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/// addPassesToJITCompile - Add passes to the specified pass manager to
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@ -45,7 +45,7 @@ bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
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PM.add(createPrologEpilogCodeInserter());
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// <insert assembly code output passes here>
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PM.add(createMachineCodeDeleter());
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return true; // change to `return false' when this actually works.
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return false;
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}
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/// addPassesToJITCompile - Add passes to the specified pass manager to
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