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https://github.com/c64scene-ar/llvm-6502.git
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Add AVX 256 binary arithmetic instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108207 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes
parent
f428fee70d
commit
a0d09a85e2
@ -1810,6 +1810,16 @@ multiclass basic_sse12_fp_binop_p<bits<8> opc, string OpcodeStr, SDNode OpNode,
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}
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}
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multiclass basic_sse12_fp_binop_p_y<bits<8> opc, string OpcodeStr,
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SDNode OpNode> {
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let mayLoad = 0 in {
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defm PSY : sse12_fp_packed<opc, !strconcat(OpcodeStr, "ps"), OpNode, VR256,
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v8f32, f256mem, memopv8f32, SSEPackedSingle, 0>, TB;
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defm PDY : sse12_fp_packed<opc, !strconcat(OpcodeStr, "pd"), OpNode, VR256,
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v4f64, f256mem, memopv4f64, SSEPackedDouble, 0>, TB, OpSize;
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}
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}
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multiclass basic_sse12_fp_binop_s_int<bits<8> opc, string OpcodeStr,
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bit Is2Addr = 1> {
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defm SS : sse12_fp_scalar_int<opc, OpcodeStr, VR128,
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@ -1829,22 +1839,28 @@ multiclass basic_sse12_fp_binop_p_int<bits<8> opc, string OpcodeStr,
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SSEPackedDouble, Is2Addr>, TB, OpSize;
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}
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// Arithmetic instructions
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// Binary Arithmetic instructions
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let isAsmParserOnly = 1, Predicates = [HasAVX] in {
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defm VADD : basic_sse12_fp_binop_s<0x58, "add", fadd, 0>,
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basic_sse12_fp_binop_p<0x58, "add", fadd, 0>, VEX_4V;
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basic_sse12_fp_binop_p<0x58, "add", fadd, 0>,
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basic_sse12_fp_binop_p_y<0x58, "add", fadd>, VEX_4V;
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defm VMUL : basic_sse12_fp_binop_s<0x59, "mul", fmul, 0>,
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basic_sse12_fp_binop_p<0x59, "mul", fmul, 0>, VEX_4V;
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basic_sse12_fp_binop_p<0x59, "mul", fmul, 0>,
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basic_sse12_fp_binop_p_y<0x59, "mul", fmul>, VEX_4V;
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let isCommutable = 0 in {
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defm VSUB : basic_sse12_fp_binop_s<0x5C, "sub", fsub, 0>,
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basic_sse12_fp_binop_p<0x5C, "sub", fsub, 0>, VEX_4V;
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basic_sse12_fp_binop_p<0x5C, "sub", fsub, 0>,
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basic_sse12_fp_binop_p_y<0x5C, "sub", fsub>, VEX_4V;
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defm VDIV : basic_sse12_fp_binop_s<0x5E, "div", fdiv, 0>,
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basic_sse12_fp_binop_p<0x5E, "div", fdiv, 0>, VEX_4V;
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basic_sse12_fp_binop_p<0x5E, "div", fdiv, 0>,
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basic_sse12_fp_binop_p_y<0x5E, "div", fdiv>, VEX_4V;
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defm VMAX : basic_sse12_fp_binop_s<0x5F, "max", X86fmax, 0>,
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basic_sse12_fp_binop_p<0x5F, "max", X86fmax, 0>, VEX_4V;
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basic_sse12_fp_binop_p<0x5F, "max", X86fmax, 0>,
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basic_sse12_fp_binop_p_y<0x5F, "max", X86fmax>, VEX_4V;
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defm VMIN : basic_sse12_fp_binop_s<0x5D, "min", X86fmin, 0>,
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basic_sse12_fp_binop_p<0x5D, "min", X86fmin, 0>, VEX_4V;
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basic_sse12_fp_binop_p<0x5D, "min", X86fmin, 0>,
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basic_sse12_fp_binop_p_y<0x5D, "min", X86fmin>, VEX_4V;
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}
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}
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@ -12406,3 +12406,99 @@
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// CHECK: encoding: [0xc5,0xf9,0x50,0xc2]
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vmovmskpd %xmm2, %eax
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// CHECK: vmaxps %ymm2, %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x5f,0xf2]
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vmaxps %ymm2, %ymm4, %ymm6
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// CHECK: vmaxpd %ymm2, %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x5f,0xf2]
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vmaxpd %ymm2, %ymm4, %ymm6
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// CHECK: vminps %ymm2, %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x5d,0xf2]
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vminps %ymm2, %ymm4, %ymm6
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// CHECK: vminpd %ymm2, %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x5d,0xf2]
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vminpd %ymm2, %ymm4, %ymm6
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// CHECK: vsubps %ymm2, %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x5c,0xf2]
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vsubps %ymm2, %ymm4, %ymm6
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// CHECK: vsubpd %ymm2, %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x5c,0xf2]
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vsubpd %ymm2, %ymm4, %ymm6
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// CHECK: vdivps %ymm2, %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x5e,0xf2]
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vdivps %ymm2, %ymm4, %ymm6
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// CHECK: vdivpd %ymm2, %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x5e,0xf2]
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vdivpd %ymm2, %ymm4, %ymm6
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// CHECK: vaddps %ymm2, %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x58,0xf2]
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vaddps %ymm2, %ymm4, %ymm6
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// CHECK: vaddpd %ymm2, %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x58,0xf2]
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vaddpd %ymm2, %ymm4, %ymm6
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// CHECK: vmulps %ymm2, %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x59,0xf2]
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vmulps %ymm2, %ymm4, %ymm6
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// CHECK: vmulpd %ymm2, %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x59,0xf2]
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vmulpd %ymm2, %ymm4, %ymm6
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// CHECK: vmaxps (%eax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x5f,0x30]
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vmaxps (%eax), %ymm4, %ymm6
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// CHECK: vmaxpd (%eax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x5f,0x30]
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vmaxpd (%eax), %ymm4, %ymm6
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// CHECK: vminps (%eax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x5d,0x30]
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vminps (%eax), %ymm4, %ymm6
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// CHECK: vminpd (%eax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x5d,0x30]
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vminpd (%eax), %ymm4, %ymm6
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// CHECK: vsubps (%eax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x5c,0x30]
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vsubps (%eax), %ymm4, %ymm6
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// CHECK: vsubpd (%eax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x5c,0x30]
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vsubpd (%eax), %ymm4, %ymm6
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// CHECK: vdivps (%eax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x5e,0x30]
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vdivps (%eax), %ymm4, %ymm6
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// CHECK: vdivpd (%eax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x5e,0x30]
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vdivpd (%eax), %ymm4, %ymm6
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// CHECK: vaddps (%eax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x58,0x30]
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vaddps (%eax), %ymm4, %ymm6
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// CHECK: vaddpd (%eax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x58,0x30]
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vaddpd (%eax), %ymm4, %ymm6
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// CHECK: vmulps (%eax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x59,0x30]
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vmulps (%eax), %ymm4, %ymm6
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// CHECK: vmulpd (%eax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x59,0x30]
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vmulpd (%eax), %ymm4, %ymm6
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@ -2480,3 +2480,99 @@ pshufb CPI1_0(%rip), %xmm1
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// CHECK: encoding: [0xc4,0xc1,0x79,0x50,0xc4]
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vmovmskpd %xmm12, %eax
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// CHECK: vmaxps %ymm12, %ymm4, %ymm6
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// CHECK: encoding: [0xc4,0xc1,0x5c,0x5f,0xf4]
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vmaxps %ymm12, %ymm4, %ymm6
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// CHECK: vmaxpd %ymm12, %ymm4, %ymm6
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// CHECK: encoding: [0xc4,0xc1,0x5d,0x5f,0xf4]
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vmaxpd %ymm12, %ymm4, %ymm6
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// CHECK: vminps %ymm12, %ymm4, %ymm6
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// CHECK: encoding: [0xc4,0xc1,0x5c,0x5d,0xf4]
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vminps %ymm12, %ymm4, %ymm6
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// CHECK: vminpd %ymm12, %ymm4, %ymm6
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// CHECK: encoding: [0xc4,0xc1,0x5d,0x5d,0xf4]
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vminpd %ymm12, %ymm4, %ymm6
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// CHECK: vsubps %ymm12, %ymm4, %ymm6
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// CHECK: encoding: [0xc4,0xc1,0x5c,0x5c,0xf4]
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vsubps %ymm12, %ymm4, %ymm6
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// CHECK: vsubpd %ymm12, %ymm4, %ymm6
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// CHECK: encoding: [0xc4,0xc1,0x5d,0x5c,0xf4]
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vsubpd %ymm12, %ymm4, %ymm6
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// CHECK: vdivps %ymm12, %ymm4, %ymm6
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// CHECK: encoding: [0xc4,0xc1,0x5c,0x5e,0xf4]
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vdivps %ymm12, %ymm4, %ymm6
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// CHECK: vdivpd %ymm12, %ymm4, %ymm6
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// CHECK: encoding: [0xc4,0xc1,0x5d,0x5e,0xf4]
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vdivpd %ymm12, %ymm4, %ymm6
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// CHECK: vaddps %ymm12, %ymm4, %ymm6
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// CHECK: encoding: [0xc4,0xc1,0x5c,0x58,0xf4]
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vaddps %ymm12, %ymm4, %ymm6
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// CHECK: vaddpd %ymm12, %ymm4, %ymm6
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// CHECK: encoding: [0xc4,0xc1,0x5d,0x58,0xf4]
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vaddpd %ymm12, %ymm4, %ymm6
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// CHECK: vmulps %ymm12, %ymm4, %ymm6
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// CHECK: encoding: [0xc4,0xc1,0x5c,0x59,0xf4]
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vmulps %ymm12, %ymm4, %ymm6
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// CHECK: vmulpd %ymm12, %ymm4, %ymm6
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// CHECK: encoding: [0xc4,0xc1,0x5d,0x59,0xf4]
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vmulpd %ymm12, %ymm4, %ymm6
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// CHECK: vmaxps (%rax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x5f,0x30]
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vmaxps (%rax), %ymm4, %ymm6
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// CHECK: vmaxpd (%rax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x5f,0x30]
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vmaxpd (%rax), %ymm4, %ymm6
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// CHECK: vminps (%rax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x5d,0x30]
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vminps (%rax), %ymm4, %ymm6
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// CHECK: vminpd (%rax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x5d,0x30]
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vminpd (%rax), %ymm4, %ymm6
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// CHECK: vsubps (%rax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x5c,0x30]
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vsubps (%rax), %ymm4, %ymm6
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// CHECK: vsubpd (%rax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x5c,0x30]
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vsubpd (%rax), %ymm4, %ymm6
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// CHECK: vdivps (%rax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x5e,0x30]
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vdivps (%rax), %ymm4, %ymm6
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// CHECK: vdivpd (%rax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x5e,0x30]
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vdivpd (%rax), %ymm4, %ymm6
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// CHECK: vaddps (%rax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x58,0x30]
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vaddps (%rax), %ymm4, %ymm6
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// CHECK: vaddpd (%rax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x58,0x30]
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vaddpd (%rax), %ymm4, %ymm6
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// CHECK: vmulps (%rax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdc,0x59,0x30]
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vmulps (%rax), %ymm4, %ymm6
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// CHECK: vmulpd (%rax), %ymm4, %ymm6
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// CHECK: encoding: [0xc5,0xdd,0x59,0x30]
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vmulpd (%rax), %ymm4, %ymm6
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