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Encode predict = 1 by default, because the Sparc assembler does this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7181 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -38,21 +38,21 @@ class F2_2<bits<4> cond, string name> : F2_br { // Format 2.2 instructions
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class F2_3<bits<4> cond, string name> : F2_br { // Format 2.3 instructions
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bits<2> cc;
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bits<19> disp;
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bit predict;
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bit predict = 1;
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bit annul;
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set Name = name;
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set Inst{29} = annul;
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set Inst{28-25} = cond;
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set Inst{21-20} = cc;
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set Inst{19} = predict;
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set Inst{19} = 1; // predict;
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set Inst{18-0} = disp;
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}
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class F2_4<bits<3> rcond, string name> : F2_br { // Format 2.4 instructions
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bits<5> rs1;
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bits<16> disp;
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bit predict;
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bit predict = 1;
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bit annul;
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set Name = name;
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@ -60,7 +60,7 @@ class F2_4<bits<3> rcond, string name> : F2_br { // Format 2.4 instructions
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set Inst{28} = 0;
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set Inst{27-25} = rcond;
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set Inst{21-20} = disp{15-14};
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set Inst{19} = predict;
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set Inst{19} = 1; // predict;
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set Inst{18-14} = rs1;
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set Inst{13-0 } = disp{13-0};
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}
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