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R600/SI: rework VOP1_* patterns v2

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Fixing asm operation names.

v2: use ZERO constant, also add asm operands

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175748 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Christian Konig
2013-02-21 15:16:53 +00:00
parent 7fa9957b16
commit a38ccb4b32
1 changed files with 22 additions and 18 deletions
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40
lib/Target/R600/SIInstrInfo.td
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@@ -141,29 +141,33 @@ class VOP3_64 <bits<9> op, string opName, list<dag> pattern> : VOP3 <
opName, pattern opName, pattern
>; >;
class VOP1_Helper <bits<8> op, RegisterClass vrc, RegisterClass arc, multiclass VOP1_Helper <bits<8> op, RegisterClass drc, RegisterClass src,
string opName, list<dag> pattern> : string opName, list<dag> pattern> {
VOP1 <
op, (outs vrc:$dst), (ins arc:$src0), opName, pattern def _e32: VOP1 <
op, (outs drc:$dst), (ins src:$src0),
opName#"_e32 $dst, $src0", pattern
>; >;
multiclass VOP1_32 <bits<8> op, string opName, list<dag> pattern> { def _e64 : VOP3 <
def _e32: VOP1_Helper <op, VReg_32, VSrc_32, opName, pattern>;
def _e64 : VOP3_32 <{1, 1, op{6}, op{5}, op{4}, op{3}, op{2}, op{1}, op{0}},
opName, []
>;
}
multiclass VOP1_64 <bits<8> op, string opName, list<dag> pattern> {
def _e32 : VOP1_Helper <op, VReg_64, VSrc_64, opName, pattern>;
def _e64 : VOP3_64 <
{1, 1, op{6}, op{5}, op{4}, op{3}, op{2}, op{1}, op{0}}, {1, 1, op{6}, op{5}, op{4}, op{3}, op{2}, op{1}, op{0}},
opName, [] (outs drc:$dst),
>; (ins src:$src0,
i32imm:$abs, i32imm:$clamp,
i32imm:$omod, i32imm:$neg),
opName#"_e64 $dst, $src0, $abs, $clamp, $omod, $neg", []
> {
let SRC1 = SIOperand.ZERO;
let SRC2 = SIOperand.ZERO;
}
} }
multiclass VOP1_32 <bits<8> op, string opName, list<dag> pattern>
: VOP1_Helper <op, VReg_32, VSrc_32, opName, pattern>;
multiclass VOP1_64 <bits<8> op, string opName, list<dag> pattern>
: VOP1_Helper <op, VReg_64, VSrc_64, opName, pattern>;
class VOP2_Helper <bits<6> op, RegisterClass vrc, RegisterClass arc, class VOP2_Helper <bits<6> op, RegisterClass vrc, RegisterClass arc,
string opName, list<dag> pattern> : string opName, list<dag> pattern> :
VOP2 < VOP2 <