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If The ARM WriteNopData() gets an unaligned byte count to pad out, fill in with

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a partial value. rdar://8782954

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122078 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-12-17 19:03:02 +00:00
parent 7fb866643e
commit a3dbd3a244
1 changed files with 13 additions and 5 deletions
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18
lib/Target/ARM/ARMAsmBackend.cpp
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@ -123,18 +123,26 @@ void ARMAsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
bool ARMAsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
if (isThumb()) {
assert (((Count & 1) == 0) && "Unaligned Nop data fragment!");
// FIXME: 0xbf00 is the ARMv7 value. For v6 and before, we'll need to
// use 0x46c0 (which is a 'mov r8, r8' insn).
Count /= 2;
for (uint64_t i = 0; i != Count; ++i)
uint64_t NumNops = Count / 2;
for (uint64_t i = 0; i != NumNops; ++i)
OW->Write16(0xbf00);
if (Count & 1)
OW->Write8(0);
return true;
}
// ARM mode
Count /= 4;
for (uint64_t i = 0; i != Count; ++i)
uint64_t NumNops = Count / 4;
for (uint64_t i = 0; i != NumNops; ++i)
OW->Write32(0xe1a00000);
switch (Count % 4) {
default: break; // No leftover bytes to write
case 1: OW->Write8(0); break;
case 2: OW->Write16(0); break;
case 3: OW->Write16(0); OW->Write8(0xa0); break;
}
return true;
}