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Nuke a few more unused asm strings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115193 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -696,7 +696,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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OutStreamer.EmitInstruction(AddInst);
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return;
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}
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case ARM::PICADD: { // FIXME: Remove asm string from td file.
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case ARM::PICADD: {
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// This is a pseudo op for a label + instruction sequence, which looks like:
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// LPC0:
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// add r0, pc, r0
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@ -767,7 +767,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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return;
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}
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case ARM::CONSTPOOL_ENTRY: { // FIXME: Remove asm string from td file.
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case ARM::CONSTPOOL_ENTRY: {
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/// CONSTPOOL_ENTRY - This instruction represents a floating constant pool
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/// in the function. The first operand is the ID# for this instruction, the
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/// second is the index into the MachineConstantPool that this is, the third
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@ -786,7 +786,8 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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return;
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}
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case ARM::MOVi2pieces: { // FIXME: Remove asmstring from td file.
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case ARM::MOVi2pieces: {
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// FIXME: We'd like to remove the asm string in the .td file, but the
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// This is a hack that lowers as a two instruction sequence.
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unsigned DstReg = MI->getOperand(0).getReg();
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unsigned ImmVal = (unsigned)MI->getOperand(1).getImm();
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@ -823,7 +824,8 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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}
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return;
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}
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case ARM::MOVi32imm: { // FIXME: Remove asmstring from td file.
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case ARM::MOVi32imm: {
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// FIXME: We'd like to remove the asm string in the .td file, but the
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// This is a hack that lowers as a two instruction sequence.
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unsigned DstReg = MI->getOperand(0).getReg();
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const MachineOperand &MO = MI->getOperand(1);
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@ -924,7 +926,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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}
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case ARM::t2Int_eh_sjlj_setjmp:
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case ARM::t2Int_eh_sjlj_setjmp_nofp:
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case ARM::tInt_eh_sjlj_setjmp: { // FIXME: Remove asmstring from td file.
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case ARM::tInt_eh_sjlj_setjmp: {
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// Two incoming args: GPR:$src, GPR:$val
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// mov $val, pc
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// adds $val, #7
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@ -1008,7 +1010,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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}
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case ARM::Int_eh_sjlj_setjmp_nofp:
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case ARM::Int_eh_sjlj_setjmp: { // FIXME: Remove asmstring from td file.
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case ARM::Int_eh_sjlj_setjmp: {
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// Two incoming args: GPR:$src, GPR:$val
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// add $val, pc, #8
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// str $val, [$src, #+4]
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@ -688,8 +688,7 @@ multiclass AI1_adde_sube_s_irs<bits<4> opcod, string opc, PatFrag opnode,
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let neverHasSideEffects = 1, isNotDuplicable = 1 in
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def CONSTPOOL_ENTRY :
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PseudoInst<(outs), (ins cpinst_operand:$instid, cpinst_operand:$cpidx,
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i32imm:$size), NoItinerary,
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"${instid:label} ${cpidx:cpentry}", []>;
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i32imm:$size), NoItinerary, "", []>;
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// FIXME: Marking these as hasSideEffects is necessary to prevent machine DCE
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// from removing one half of the matched pairs. That breaks PEI, which assumes
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@ -845,41 +844,41 @@ def TRAP : AXI<(outs), (ins), MiscFrm, NoItinerary,
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// Address computation and loads and stores in PIC mode.
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let isNotDuplicable = 1 in {
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def PICADD : AXI1<0b0100, (outs GPR:$dst), (ins GPR:$a, pclabel:$cp, pred:$p),
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Pseudo, IIC_iALUr, "\n$cp:\n\tadd$p\t$dst, pc, $a",
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Pseudo, IIC_iALUr, "",
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[(set GPR:$dst, (ARMpic_add GPR:$a, imm:$cp))]>;
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let AddedComplexity = 10 in {
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def PICLDR : AXI2ldw<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
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Pseudo, IIC_iLoad_r, "\n${addr:label}:\n\tldr$p\t$dst, $addr",
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Pseudo, IIC_iLoad_r, "",
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[(set GPR:$dst, (load addrmodepc:$addr))]>;
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def PICLDRH : AXI3ldh<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
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Pseudo, IIC_iLoad_bh_r, "\n${addr:label}:\n\tldrh${p}\t$dst, $addr",
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Pseudo, IIC_iLoad_bh_r, "",
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[(set GPR:$dst, (zextloadi16 addrmodepc:$addr))]>;
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def PICLDRB : AXI2ldb<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
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Pseudo, IIC_iLoad_bh_r, "\n${addr:label}:\n\tldrb${p}\t$dst, $addr",
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Pseudo, IIC_iLoad_bh_r, "",
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[(set GPR:$dst, (zextloadi8 addrmodepc:$addr))]>;
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def PICLDRSH : AXI3ldsh<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
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Pseudo, IIC_iLoad_bh_r, "\n${addr:label}:\n\tldrsh${p}\t$dst, $addr",
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Pseudo, IIC_iLoad_bh_r, "",
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[(set GPR:$dst, (sextloadi16 addrmodepc:$addr))]>;
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def PICLDRSB : AXI3ldsb<(outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
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Pseudo, IIC_iLoad_bh_r, "\n${addr:label}:\n\tldrsb${p}\t$dst, $addr",
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Pseudo, IIC_iLoad_bh_r, "",
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[(set GPR:$dst, (sextloadi8 addrmodepc:$addr))]>;
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}
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let AddedComplexity = 10 in {
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def PICSTR : AXI2stw<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
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Pseudo, IIC_iStore_r, "\n${addr:label}:\n\tstr$p\t$src, $addr",
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Pseudo, IIC_iStore_r, "",
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[(store GPR:$src, addrmodepc:$addr)]>;
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def PICSTRH : AXI3sth<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
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Pseudo, IIC_iStore_bh_r, "\n${addr:label}:\n\tstrh${p}\t$src, $addr",
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Pseudo, IIC_iStore_bh_r, "",
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[(truncstorei16 GPR:$src, addrmodepc:$addr)]>;
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def PICSTRB : AXI2stb<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
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Pseudo, IIC_iStore_bh_r, "\n${addr:label}:\n\tstrb${p}\t$src, $addr",
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Pseudo, IIC_iStore_bh_r, "",
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[(truncstorei8 GPR:$src, addrmodepc:$addr)]>;
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}
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} // isNotDuplicable = 1
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@ -208,8 +208,7 @@ def tCPS : T1I<(outs), (ins cps_opt:$opt), NoItinerary, "cps$opt",
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// For both thumb1 and thumb2.
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let isNotDuplicable = 1 in
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def tPICADD : TIt<(outs GPR:$dst), (ins GPR:$lhs, pclabel:$cp), IIC_iALUr,
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"\n$cp:\n\tadd\t$dst, pc",
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def tPICADD : TIt<(outs GPR:$dst), (ins GPR:$lhs, pclabel:$cp), IIC_iALUr, "",
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[(set GPR:$dst, (ARMpic_add GPR:$lhs, imm:$cp))]>,
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T1Special<{0,0,?,?}> {
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let Inst{6-3} = 0b1111; // A8.6.6 Rm = pc
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