mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-17 20:29:31 +00:00
Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin:
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/ -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include -DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o libgcc/x86_64/_negdi2_s.o Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311. /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/ -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include -DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o libgcc/x86_64/_lshrdi3_s.o ../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://developer.apple.com/bugreporter> for instructions. {standard input}:unknown:Undefined local symbol LBB21_11 {standard input}:unknown:Undefined local symbol LBB21_12 {standard input}:unknown:Undefined local symbol LBB21_13 {standard input}:unknown:Undefined local symbol LBB21_8 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55928 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling
parent
debdea0a66
commit
a425e0073d
@ -255,8 +255,8 @@ def int_eh_selector_i64 : Intrinsic<[llvm_i64_ty, llvm_ptr_ty, llvm_ptr_ty,
|
||||
def int_eh_typeid_for_i32 : Intrinsic<[llvm_i32_ty, llvm_ptr_ty]>;
|
||||
def int_eh_typeid_for_i64 : Intrinsic<[llvm_i64_ty, llvm_ptr_ty]>;
|
||||
|
||||
def int_eh_return_i32 : Intrinsic<[llvm_void_ty, llvm_i32_ty, llvm_ptr_ty]>;
|
||||
def int_eh_return_i64 : Intrinsic<[llvm_void_ty, llvm_i64_ty, llvm_ptr_ty]>;
|
||||
def int_eh_return : Intrinsic<[llvm_void_ty, llvm_i32_ty, llvm_ptr_ty]>,
|
||||
GCCBuiltin<"__builtin_eh_return">;
|
||||
|
||||
def int_eh_unwind_init: Intrinsic<[llvm_void_ty]>,
|
||||
GCCBuiltin<"__builtin_unwind_init">;
|
||||
|
||||
@ -68,6 +68,15 @@ namespace FileModel {
|
||||
};
|
||||
}
|
||||
|
||||
// Stack canary model types.
|
||||
namespace StackCanaries {
|
||||
enum Model {
|
||||
Default,
|
||||
On,
|
||||
Always
|
||||
};
|
||||
}
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
///
|
||||
/// TargetMachine - Primary interface to the complete machine description for
|
||||
|
||||
@ -3115,7 +3115,7 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
|
||||
MachineModuleInfo *MMI = DAG.getMachineModuleInfo();
|
||||
MVT VT = (Intrinsic == Intrinsic::eh_typeid_for_i32 ?
|
||||
MVT::i32 : MVT::i64);
|
||||
|
||||
|
||||
if (MMI) {
|
||||
// Find the type id for the given typeinfo.
|
||||
GlobalVariable *GV = ExtractTypeInfo(I.getOperand(1));
|
||||
@ -3130,9 +3130,10 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
case Intrinsic::eh_return_i32:
|
||||
case Intrinsic::eh_return_i64:
|
||||
if (MachineModuleInfo *MMI = DAG.getMachineModuleInfo()) {
|
||||
case Intrinsic::eh_return: {
|
||||
MachineModuleInfo *MMI = DAG.getMachineModuleInfo();
|
||||
|
||||
if (MMI) {
|
||||
MMI->setCallsEHReturn(true);
|
||||
DAG.setRoot(DAG.getNode(ISD::EH_RETURN,
|
||||
MVT::Other,
|
||||
@ -3144,36 +3145,39 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
|
||||
}
|
||||
|
||||
return 0;
|
||||
case Intrinsic::eh_unwind_init:
|
||||
if (MachineModuleInfo *MMI = DAG.getMachineModuleInfo()) {
|
||||
MMI->setCallsUnwindInit(true);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
case Intrinsic::eh_unwind_init: {
|
||||
if (MachineModuleInfo *MMI = DAG.getMachineModuleInfo()) {
|
||||
MMI->setCallsUnwindInit(true);
|
||||
}
|
||||
|
||||
case Intrinsic::eh_dwarf_cfa: {
|
||||
MVT VT = getValue(I.getOperand(1)).getValueType();
|
||||
SDValue CfaArg;
|
||||
if (VT.bitsGT(TLI.getPointerTy()))
|
||||
CfaArg = DAG.getNode(ISD::TRUNCATE,
|
||||
TLI.getPointerTy(), getValue(I.getOperand(1)));
|
||||
else
|
||||
CfaArg = DAG.getNode(ISD::SIGN_EXTEND,
|
||||
TLI.getPointerTy(), getValue(I.getOperand(1)));
|
||||
return 0;
|
||||
}
|
||||
|
||||
SDValue Offset = DAG.getNode(ISD::ADD,
|
||||
TLI.getPointerTy(),
|
||||
DAG.getNode(ISD::FRAME_TO_ARGS_OFFSET,
|
||||
TLI.getPointerTy()),
|
||||
CfaArg);
|
||||
setValue(&I, DAG.getNode(ISD::ADD,
|
||||
TLI.getPointerTy(),
|
||||
DAG.getNode(ISD::FRAMEADDR,
|
||||
TLI.getPointerTy(),
|
||||
DAG.getConstant(0,
|
||||
TLI.getPointerTy())),
|
||||
Offset));
|
||||
return 0;
|
||||
case Intrinsic::eh_dwarf_cfa: {
|
||||
MVT VT = getValue(I.getOperand(1)).getValueType();
|
||||
SDValue CfaArg;
|
||||
if (VT.bitsGT(TLI.getPointerTy()))
|
||||
CfaArg = DAG.getNode(ISD::TRUNCATE,
|
||||
TLI.getPointerTy(), getValue(I.getOperand(1)));
|
||||
else
|
||||
CfaArg = DAG.getNode(ISD::SIGN_EXTEND,
|
||||
TLI.getPointerTy(), getValue(I.getOperand(1)));
|
||||
|
||||
SDValue Offset = DAG.getNode(ISD::ADD,
|
||||
TLI.getPointerTy(),
|
||||
DAG.getNode(ISD::FRAME_TO_ARGS_OFFSET,
|
||||
TLI.getPointerTy()),
|
||||
CfaArg);
|
||||
setValue(&I, DAG.getNode(ISD::ADD,
|
||||
TLI.getPointerTy(),
|
||||
DAG.getNode(ISD::FRAMEADDR,
|
||||
TLI.getPointerTy(),
|
||||
DAG.getConstant(0,
|
||||
TLI.getPointerTy())),
|
||||
Offset));
|
||||
return 0;
|
||||
}
|
||||
|
||||
case Intrinsic::sqrt:
|
||||
|
||||
@ -40,6 +40,7 @@ namespace llvm {
|
||||
bool RealignStack;
|
||||
bool VerboseAsm;
|
||||
bool DisableJumpTables;
|
||||
StackCanaries::Model StackProtectors;
|
||||
}
|
||||
|
||||
static cl::opt<bool, true> PrintCode("print-machineinstrs",
|
||||
@ -163,6 +164,21 @@ DisableSwitchTables(cl::Hidden, "disable-jump-tables",
|
||||
cl::location(DisableJumpTables),
|
||||
cl::init(false));
|
||||
|
||||
static cl::opt<llvm::StackCanaries::Model, true>
|
||||
GenerateStackProtectors("stack-protector",
|
||||
cl::desc("Generate stack protectors"),
|
||||
cl::location(StackProtectors),
|
||||
cl::init(StackCanaries::Default),
|
||||
cl::values(
|
||||
clEnumValN(StackCanaries::Default, "default",
|
||||
" No stack protectors"),
|
||||
clEnumValN(StackCanaries::On, "on",
|
||||
" Generate stack protectors for functions that"
|
||||
"need them"),
|
||||
clEnumValN(StackCanaries::Always, "all",
|
||||
" Generate stack protectors for all functions"),
|
||||
clEnumValEnd));
|
||||
|
||||
//---------------------------------------------------------------------------
|
||||
// TargetMachine Class
|
||||
//
|
||||
|
||||
@ -316,6 +316,7 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
|
||||
setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand);
|
||||
setOperationAction(ISD::EHSELECTION, MVT::i32, Expand);
|
||||
if (Subtarget->is64Bit()) {
|
||||
// FIXME: Verify
|
||||
setExceptionPointerRegister(X86::RAX);
|
||||
setExceptionSelectorRegister(X86::RDX);
|
||||
} else {
|
||||
@ -5595,7 +5596,7 @@ SDValue X86TargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) {
|
||||
|
||||
SDValue RetAddrFI = getReturnAddressFrameIndex(DAG);
|
||||
return DAG.getNode(ISD::SUB, getPointerTy(), RetAddrFI,
|
||||
DAG.getIntPtrConstant(Subtarget->is64Bit() ? 8 : 4));
|
||||
DAG.getIntPtrConstant(!Subtarget->is64Bit() ? 4 : 8));
|
||||
}
|
||||
|
||||
SDValue X86TargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDValue Op,
|
||||
@ -5605,26 +5606,26 @@ SDValue X86TargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDValue Op,
|
||||
|
||||
SDValue X86TargetLowering::LowerEH_RETURN(SDValue Op, SelectionDAG &DAG)
|
||||
{
|
||||
assert(!Subtarget->is64Bit() &&
|
||||
"Lowering of eh_return builtin is not supported yet on x86-64");
|
||||
|
||||
MachineFunction &MF = DAG.getMachineFunction();
|
||||
SDValue Chain = Op.getOperand(0);
|
||||
SDValue Offset = Op.getOperand(1);
|
||||
SDValue Handler = Op.getOperand(2);
|
||||
|
||||
SDValue Frame = DAG.getRegister(Subtarget->is64Bit() ? X86::RBP : X86::EBP,
|
||||
getPointerTy());
|
||||
unsigned StoreAddrReg = (Subtarget->is64Bit() ? X86::RCX : X86::ECX);
|
||||
SDValue Frame = DAG.getRegister(RegInfo->getFrameRegister(MF),
|
||||
getPointerTy());
|
||||
|
||||
SDValue StoreAddr = DAG.getNode(ISD::SUB, getPointerTy(), Frame,
|
||||
DAG.getIntPtrConstant(Subtarget->is64Bit() ?
|
||||
-8UL: -4UL));
|
||||
DAG.getIntPtrConstant(-4UL));
|
||||
StoreAddr = DAG.getNode(ISD::ADD, getPointerTy(), StoreAddr, Offset);
|
||||
Chain = DAG.getStore(Chain, Handler, StoreAddr, NULL, 0);
|
||||
Chain = DAG.getCopyToReg(Chain, StoreAddrReg, StoreAddr);
|
||||
MF.getRegInfo().addLiveOut(StoreAddrReg);
|
||||
Chain = DAG.getCopyToReg(Chain, X86::ECX, StoreAddr);
|
||||
MF.getRegInfo().addLiveOut(X86::ECX);
|
||||
|
||||
return DAG.getNode(X86ISD::EH_RETURN,
|
||||
MVT::Other,
|
||||
Chain, DAG.getRegister(StoreAddrReg, getPointerTy()));
|
||||
return DAG.getNode(X86ISD::EH_RETURN, MVT::Other,
|
||||
Chain, DAG.getRegister(X86::ECX, getPointerTy()));
|
||||
}
|
||||
|
||||
SDValue X86TargetLowering::LowerTRAMPOLINE(SDValue Op,
|
||||
|
||||
@ -129,17 +129,6 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
|
||||
[(brind (loadi64 addr:$dst))]>;
|
||||
}
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// EH Pseudo Instructions
|
||||
//
|
||||
let isTerminator = 1, isReturn = 1, isBarrier = 1,
|
||||
hasCtrlDep = 1 in {
|
||||
def EH_RETURN64 : I<0xC3, RawFrm, (outs), (ins GR64:$addr),
|
||||
"ret\t#eh_return, addr: $addr",
|
||||
[(X86ehret GR64:$addr)]>;
|
||||
|
||||
}
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// Miscellaneous Instructions...
|
||||
//
|
||||
|
||||
@ -159,14 +159,6 @@ X86RegisterInfo::getCrossCopyRegClass(const TargetRegisterClass *RC) const {
|
||||
|
||||
const unsigned *
|
||||
X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
|
||||
bool callsEHReturn = false;
|
||||
|
||||
if (MF) {
|
||||
const MachineFrameInfo *MFI = MF->getFrameInfo();
|
||||
const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
|
||||
callsEHReturn = (MMI ? MMI->callsEHReturn() : false);
|
||||
}
|
||||
|
||||
static const unsigned CalleeSavedRegs32Bit[] = {
|
||||
X86::ESI, X86::EDI, X86::EBX, X86::EBP, 0
|
||||
};
|
||||
@ -179,11 +171,6 @@ X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
|
||||
X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0
|
||||
};
|
||||
|
||||
static const unsigned CalleeSavedRegs64EHRet[] = {
|
||||
X86::RAX, X86::RDX, X86::RBX, X86::R12,
|
||||
X86::R13, X86::R14, X86::R15, X86::RBP, 0
|
||||
};
|
||||
|
||||
static const unsigned CalleeSavedRegsWin64[] = {
|
||||
X86::RBX, X86::RBP, X86::RDI, X86::RSI,
|
||||
X86::R12, X86::R13, X86::R14, X86::R15, 0
|
||||
@ -193,22 +180,20 @@ X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
|
||||
if (IsWin64)
|
||||
return CalleeSavedRegsWin64;
|
||||
else
|
||||
return (callsEHReturn ? CalleeSavedRegs64EHRet : CalleeSavedRegs64Bit);
|
||||
return CalleeSavedRegs64Bit;
|
||||
} else {
|
||||
return (callsEHReturn ? CalleeSavedRegs32EHRet : CalleeSavedRegs32Bit);
|
||||
if (MF) {
|
||||
const MachineFrameInfo *MFI = MF->getFrameInfo();
|
||||
const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
|
||||
if (MMI && MMI->callsEHReturn())
|
||||
return CalleeSavedRegs32EHRet;
|
||||
}
|
||||
return CalleeSavedRegs32Bit;
|
||||
}
|
||||
}
|
||||
|
||||
const TargetRegisterClass* const*
|
||||
X86RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
|
||||
bool callsEHReturn = false;
|
||||
|
||||
if (MF) {
|
||||
const MachineFrameInfo *MFI = MF->getFrameInfo();
|
||||
const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
|
||||
callsEHReturn = (MMI ? MMI->callsEHReturn() : false);
|
||||
}
|
||||
|
||||
static const TargetRegisterClass * const CalleeSavedRegClasses32Bit[] = {
|
||||
&X86::GR32RegClass, &X86::GR32RegClass,
|
||||
&X86::GR32RegClass, &X86::GR32RegClass, 0
|
||||
@ -223,12 +208,6 @@ X86RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
|
||||
&X86::GR64RegClass, &X86::GR64RegClass,
|
||||
&X86::GR64RegClass, &X86::GR64RegClass, 0
|
||||
};
|
||||
static const TargetRegisterClass * const CalleeSavedRegClasses64EHRet[] = {
|
||||
&X86::GR64RegClass, &X86::GR64RegClass,
|
||||
&X86::GR64RegClass, &X86::GR64RegClass,
|
||||
&X86::GR64RegClass, &X86::GR64RegClass,
|
||||
&X86::GR64RegClass, &X86::GR64RegClass, 0
|
||||
};
|
||||
static const TargetRegisterClass * const CalleeSavedRegClassesWin64[] = {
|
||||
&X86::GR64RegClass, &X86::GR64RegClass,
|
||||
&X86::GR64RegClass, &X86::GR64RegClass,
|
||||
@ -240,12 +219,17 @@ X86RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
|
||||
if (IsWin64)
|
||||
return CalleeSavedRegClassesWin64;
|
||||
else
|
||||
return (callsEHReturn ?
|
||||
CalleeSavedRegClasses64EHRet : CalleeSavedRegClasses64Bit);
|
||||
return CalleeSavedRegClasses64Bit;
|
||||
} else {
|
||||
return (callsEHReturn ?
|
||||
CalleeSavedRegClasses32EHRet : CalleeSavedRegClasses32Bit);
|
||||
if (MF) {
|
||||
const MachineFrameInfo *MFI = MF->getFrameInfo();
|
||||
const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
|
||||
if (MMI && MMI->callsEHReturn())
|
||||
return CalleeSavedRegClasses32EHRet;
|
||||
}
|
||||
return CalleeSavedRegClasses32Bit;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
|
||||
@ -803,7 +787,6 @@ void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
|
||||
case X86::TCRETURNri64:
|
||||
case X86::TCRETURNdi64:
|
||||
case X86::EH_RETURN:
|
||||
case X86::EH_RETURN64:
|
||||
case X86::TAILJMPd:
|
||||
case X86::TAILJMPr:
|
||||
case X86::TAILJMPm: break; // These are ok
|
||||
@ -877,13 +860,12 @@ void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
|
||||
}
|
||||
|
||||
// We're returning from function via eh_return.
|
||||
if (RetOpcode == X86::EH_RETURN || RetOpcode == X86::EH_RETURN64) {
|
||||
if (RetOpcode == X86::EH_RETURN) {
|
||||
MBBI = prior(MBB.end());
|
||||
MachineOperand &DestAddr = MBBI->getOperand(0);
|
||||
assert(DestAddr.isRegister() && "Offset should be in register!");
|
||||
BuildMI(MBB, MBBI,
|
||||
TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),
|
||||
StackPtr).addReg(DestAddr.getReg());
|
||||
BuildMI(MBB, MBBI, TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),StackPtr).
|
||||
addReg(DestAddr.getReg());
|
||||
// Tail call return: adjust the stack pointer and jump to callee
|
||||
} else if (RetOpcode == X86::TCRETURNri || RetOpcode == X86::TCRETURNdi ||
|
||||
RetOpcode== X86::TCRETURNri64 || RetOpcode == X86::TCRETURNdi64) {
|
||||
|
||||
@ -230,6 +230,7 @@ X86DarwinTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason,
|
||||
|
||||
X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM):
|
||||
X86TargetAsmInfo(TM), ELFTargetAsmInfo(TM) {
|
||||
bool is64Bit = ETM->getSubtarget<X86Subtarget>().is64Bit();
|
||||
|
||||
ReadOnlySection = ".rodata";
|
||||
FourByteConstantSection = "\t.section\t.rodata.cst4,\"aM\",@progbits,4";
|
||||
@ -260,7 +261,8 @@ X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM):
|
||||
DwarfMacInfoSection = "\t.section\t.debug_macinfo,\"\",@progbits";
|
||||
|
||||
// Exceptions handling
|
||||
SupportsExceptionHandling = true;
|
||||
if (!is64Bit)
|
||||
SupportsExceptionHandling = true;
|
||||
AbsoluteEHSectionOffsets = false;
|
||||
DwarfEHFrameSection = "\t.section\t.eh_frame,\"aw\",@progbits";
|
||||
DwarfExceptionSection = "\t.section\t.gcc_except_table,\"a\",@progbits";
|
||||
|
||||
@ -1,17 +0,0 @@
|
||||
; Check that eh_return & unwind_init were properly lowered
|
||||
; RUN: llvm-as < %s | llc | grep %ebp | count 9
|
||||
; RUN: llvm-as < %s | llc | grep %ecx | count 5
|
||||
|
||||
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
|
||||
target triple = "i386-pc-linux"
|
||||
|
||||
define i8* @test(i32 %a, i8* %b) {
|
||||
entry:
|
||||
call void @llvm.eh.unwind.init()
|
||||
%foo = alloca i32
|
||||
call void @llvm.eh.return.i32(i32 %a, i8* %b)
|
||||
unreachable
|
||||
}
|
||||
|
||||
declare void @llvm.eh.return.i32(i32, i8*)
|
||||
declare void @llvm.eh.unwind.init()
|
||||
@ -1,17 +0,0 @@
|
||||
; Check that eh_return & unwind_init were properly lowered
|
||||
; RUN: llvm-as < %s | llc | grep %rbp | count 7
|
||||
; RUN: llvm-as < %s | llc | grep %rcx | count 3
|
||||
|
||||
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
|
||||
target triple = "x86_64-unknown-linux-gnu"
|
||||
|
||||
define i8* @test(i64 %a, i8* %b) {
|
||||
entry:
|
||||
call void @llvm.eh.unwind.init()
|
||||
%foo = alloca i32
|
||||
call void @llvm.eh.return.i64(i64 %a, i8* %b)
|
||||
unreachable
|
||||
}
|
||||
|
||||
declare void @llvm.eh.return.i64(i64, i8*)
|
||||
declare void @llvm.eh.unwind.init()
|
||||
Loading…
Reference in New Issue
Block a user