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Enforce stricter liveness rules for PHIs.
Verify that all paths from the entry block to a virtual register read pass through a def. Enable this check even when MRI->isSSA() is false. Verify that the live range of a virtual register is live out of all predecessor blocks, even for PHI-values. This requires that PHIElimination sometimes inserts IMPLICIT_DEF instruction in predecessor blocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159150 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1049,7 +1049,7 @@ void MachineVerifier::visitMachineFunctionAfter() {
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// Now check liveness info if available
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calcRegsRequired();
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if (MRI->isSSA() && !MF->empty()) {
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if (!MF->empty()) {
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BBInfo &MInfo = MBBInfoMap[&MF->front()];
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for (RegSet::iterator
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I = MInfo.vregsRequired.begin(), E = MInfo.vregsRequired.end(); I != E;
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@ -1332,15 +1332,18 @@ void MachineVerifier::verifyLiveIntervals() {
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++MFI;
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continue;
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}
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// Is VNI a PHI-def in the current block?
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bool IsPHI = VNI->isPHIDef() &&
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VNI->def == LiveInts->getMBBStartIdx(MFI);
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// Check that VNI is live-out of all predecessors.
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for (MachineBasicBlock::const_pred_iterator PI = MFI->pred_begin(),
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PE = MFI->pred_end(); PI != PE; ++PI) {
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SlotIndex PEnd = LiveInts->getMBBEndIdx(*PI);
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const VNInfo *PVNI = LI.getVNInfoBefore(PEnd);
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if (VNI->isPHIDef() && VNI->def == LiveInts->getMBBStartIdx(MFI))
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continue;
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// All predecessors must have a live-out value.
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if (!PVNI) {
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report("Register not marked live out of predecessor", *PI);
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*OS << "Valno #" << VNI->id << " live into BB#" << MFI->getNumber()
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@ -1349,12 +1352,14 @@ void MachineVerifier::verifyLiveIntervals() {
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continue;
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}
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if (PVNI != VNI) {
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// Only PHI-defs can take different predecessor values.
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if (!IsPHI && PVNI != VNI) {
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report("Different value live out of predecessor", *PI);
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*OS << "Valno #" << PVNI->id << " live out of BB#"
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<< (*PI)->getNumber() << '@' << PEnd
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<< "\nValno #" << VNI->id << " live into BB#" << MFI->getNumber()
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<< '@' << LiveInts->getMBBStartIdx(MFI) << " in " << LI << '\n';
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<< '@' << LiveInts->getMBBStartIdx(MFI) << " in "
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<< PrintReg(Reg) << ": " << LI << '\n';
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}
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}
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if (&*MFI == EndMBB)
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26
test/CodeGen/Generic/undef-phi.ll
Normal file
26
test/CodeGen/Generic/undef-phi.ll
Normal file
@ -0,0 +1,26 @@
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; RUN: llc < %s -verify-machineinstrs -verify-coalescing
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;
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; This function has a PHI with one undefined input. Verify that PHIElimination
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; inserts an IMPLICIT_DEF instruction in the predecessor so all paths to the use
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; pass through a def.
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%struct.xx_stack = type { i32, %struct.xx_stack* }
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define i32 @push(%struct.xx_stack* %stack) nounwind uwtable readonly ssp {
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entry:
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%tobool1 = icmp eq %struct.xx_stack* %stack, null
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br i1 %tobool1, label %for.end, label %for.body
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for.body:
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%stack.addr.02 = phi %struct.xx_stack* [ %0, %for.body ], [ %stack, %entry ]
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%next = getelementptr inbounds %struct.xx_stack* %stack.addr.02, i64 0, i32 1
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%0 = load %struct.xx_stack** %next, align 8
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%tobool = icmp eq %struct.xx_stack* %0, null
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br i1 %tobool, label %for.end, label %for.body
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for.end:
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%top.0.lcssa = phi %struct.xx_stack* [ undef, %entry ], [ %stack.addr.02, %for.body ]
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%first = getelementptr inbounds %struct.xx_stack* %top.0.lcssa, i64 0, i32 0
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%1 = load i32* %first, align 4
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ret i32 %1
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}
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