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[FastISel][AArch64] Add sqrt intrinsic support.
Fixes <rdar://problem/17867067>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214388 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1708,6 +1708,25 @@ bool AArch64FastISel::FastLowerIntrinsicCall(const IntrinsicInst *II) {
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.addImm(1);
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return true;
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}
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case Intrinsic::sqrt: {
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Type *RetTy = II->getCalledFunction()->getReturnType();
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MVT VT;
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if (!isTypeLegal(RetTy, VT))
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return false;
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unsigned Op0Reg = getRegForValue(II->getOperand(0));
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if (!Op0Reg)
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return false;
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bool Op0IsKill = hasTrivialKill(II->getOperand(0));
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unsigned ResultReg = FastEmit_r(VT, VT, ISD::FSQRT, Op0Reg, Op0IsKill);
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if (!ResultReg)
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return false;
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UpdateValueMap(II, ResultReg);
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return true;
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}
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case Intrinsic::sadd_with_overflow:
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case Intrinsic::uadd_with_overflow:
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case Intrinsic::ssub_with_overflow:
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20
test/CodeGen/AArch64/fast-isel-sqrt.ll
Normal file
20
test/CodeGen/AArch64/fast-isel-sqrt.ll
Normal file
@ -0,0 +1,20 @@
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; RUN: llc -mtriple=arm64-apple-darwin < %s | FileCheck %s
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; RUN: llc -mtriple=arm64-apple-darwin -fast-isel -fast-isel-abort < %s | FileCheck %s
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define float @test_sqrt_f32(float %a) {
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; CHECK-LABEL: test_sqrt_f32
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; CHECK: fsqrt s0, s0
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%res = call float @llvm.sqrt.f32(float %a)
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ret float %res
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}
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declare float @llvm.sqrt.f32(float) nounwind readnone
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define double @test_sqrt_f64(double %a) {
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; CHECK-LABEL: test_sqrt_f64
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; CHECK: fsqrt d0, d0
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%res = call double @llvm.sqrt.f64(double %a)
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ret double %res
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}
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declare double @llvm.sqrt.f64(double) nounwind readnone
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