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InstCombine: Don't just copy known bits from the first operand of an srem.
That's obviously wrong. Conservatively restrict it to the sign bit, which matches the original intention of this analysis. Fixes PR15940. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181518 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -754,7 +754,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
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ComputeMaskedBits(I->getOperand(0), LHSKnownZero, LHSKnownOne, Depth+1);
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// If it's known zero, our sign bit is also zero.
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if (LHSKnownZero.isNegative())
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KnownZero |= LHSKnownZero;
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KnownZero.setBit(KnownZero.getBitWidth() - 1);
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}
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break;
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case Instruction::URem: {
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@ -707,6 +707,18 @@ define i1 @test69(i32 %c) nounwind uwtable {
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ret i1 %3
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}
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; PR15940
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; CHECK: @test70
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; CHECK-NEXT: %A = srem i32 5, %X
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; CHECK-NEXT: %C = icmp ne i32 %A, 2
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; CHECK-NEXT: ret i1 %C
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define i1 @test70(i32 %X) {
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%A = srem i32 5, %X
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%B = add i32 %A, 2
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%C = icmp ne i32 %B, 4
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ret i1 %C
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}
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; CHECK: @icmp_sext16trunc
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; CHECK-NEXT: %1 = trunc i32 %x to i16
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; CHECK-NEXT: %cmp = icmp slt i16 %1, 36
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