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https://github.com/c64scene-ar/llvm-6502.git
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[Mips64] Add support for MCJIT for MIPS64r2 and MIPS64r6
Add support for resolving MIPS64r2 and MIPS64r6 relocations in MCJIT. Patch by Vladimir Radosavljevic. Differential Revision: http://reviews.llvm.org/D9667 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238424 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Petar Jovanovic
parent
b97d261a17
commit
a703f676f7
@ -149,6 +149,7 @@ RuntimeDyldImpl::loadObjectImpl(const object::ObjectFile &Obj) {
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// Save information about our target
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Arch = (Triple::ArchType)Obj.getArch();
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IsTargetLittleEndian = Obj.isLittleEndian();
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setMipsABI(Obj);
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// Compute the memory size required to load all sections to be loaded
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// and pass this information to the memory manager
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@ -689,7 +690,7 @@ uint8_t *RuntimeDyldImpl::createStubFunction(uint8_t *Addr,
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// and stubs for branches Thumb - ARM and ARM - Thumb.
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writeBytesUnaligned(0xe51ff004, Addr, 4); // ldr pc,<label>
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return Addr + 4;
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} else if (Arch == Triple::mipsel || Arch == Triple::mips) {
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} else if (IsMipsO32ABI) {
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// 0: 3c190000 lui t9,%hi(addr).
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// 4: 27390000 addiu t9,t9,%lo(addr).
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// 8: 03200008 jr t9.
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@ -507,6 +507,199 @@ void RuntimeDyldELF::resolveMIPSRelocation(const SectionEntry &Section,
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}
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}
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void RuntimeDyldELF::setMipsABI(const ObjectFile &Obj) {
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if (!StringRef(Triple::getArchTypePrefix(Arch)).equals("mips")) {
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IsMipsO32ABI = false;
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IsMipsN64ABI = false;
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return;
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}
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unsigned AbiVariant;
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Obj.getPlatformFlags(AbiVariant);
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IsMipsO32ABI = AbiVariant & ELF::EF_MIPS_ABI_O32;
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IsMipsN64ABI = Obj.getFileFormatName().equals("ELF64-mips");
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if (AbiVariant & ELF::EF_MIPS_ABI2)
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llvm_unreachable("Mips N32 ABI is not supported yet");
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}
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void RuntimeDyldELF::resolveMIPS64Relocation(const SectionEntry &Section,
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uint64_t Offset, uint64_t Value,
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uint32_t Type, int64_t Addend,
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uint64_t SymOffset,
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SID SectionID) {
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uint32_t r_type = Type & 0xff;
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uint32_t r_type2 = (Type >> 8) & 0xff;
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uint32_t r_type3 = (Type >> 16) & 0xff;
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// RelType is used to keep information for which relocation type we are
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// applying relocation.
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uint32_t RelType = r_type;
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int64_t CalculatedValue = evaluateMIPS64Relocation(Section, Offset, Value,
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RelType, Addend,
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SymOffset, SectionID);
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if (r_type2 != ELF::R_MIPS_NONE) {
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RelType = r_type2;
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CalculatedValue = evaluateMIPS64Relocation(Section, Offset, 0, RelType,
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CalculatedValue, SymOffset,
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SectionID);
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}
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if (r_type3 != ELF::R_MIPS_NONE) {
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RelType = r_type3;
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CalculatedValue = evaluateMIPS64Relocation(Section, Offset, 0, RelType,
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CalculatedValue, SymOffset,
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SectionID);
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}
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applyMIPS64Relocation(Section.Address + Offset, CalculatedValue, RelType);
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}
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int64_t
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RuntimeDyldELF::evaluateMIPS64Relocation(const SectionEntry &Section,
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uint64_t Offset, uint64_t Value,
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uint32_t Type, int64_t Addend,
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uint64_t SymOffset, SID SectionID) {
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DEBUG(dbgs() << "evaluateMIPS64Relocation, LocalAddress: 0x"
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<< format("%llx", Section.Address + Offset)
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<< " FinalAddress: 0x"
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<< format("%llx", Section.LoadAddress + Offset)
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<< " Value: 0x" << format("%llx", Value) << " Type: 0x"
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<< format("%x", Type) << " Addend: 0x" << format("%llx", Addend)
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<< " SymOffset: " << format("%x", SymOffset)
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<< "\n");
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switch (Type) {
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default:
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llvm_unreachable("Not implemented relocation type!");
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break;
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case ELF::R_MIPS_JALR:
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case ELF::R_MIPS_NONE:
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break;
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case ELF::R_MIPS_32:
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case ELF::R_MIPS_64:
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return Value + Addend;
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case ELF::R_MIPS_26:
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return ((Value + Addend) >> 2) & 0x3ffffff;
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case ELF::R_MIPS_GPREL16: {
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uint64_t GOTAddr = getSectionLoadAddress(SectionToGOTMap[SectionID]);
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return Value + Addend - (GOTAddr + 0x7ff0);
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}
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case ELF::R_MIPS_SUB:
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return Value - Addend;
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case ELF::R_MIPS_HI16:
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// Get the higher 16-bits. Also add 1 if bit 15 is 1.
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return ((Value + Addend + 0x8000) >> 16) & 0xffff;
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case ELF::R_MIPS_LO16:
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return (Value + Addend) & 0xffff;
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case ELF::R_MIPS_CALL16:
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case ELF::R_MIPS_GOT_DISP:
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case ELF::R_MIPS_GOT_PAGE: {
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uint8_t *LocalGOTAddr =
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getSectionAddress(SectionToGOTMap[SectionID]) + SymOffset;
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uint64_t GOTEntry = readBytesUnaligned(LocalGOTAddr, 8);
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Value += Addend;
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if (Type == ELF::R_MIPS_GOT_PAGE)
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Value = (Value + 0x8000) & ~0xffff;
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if (GOTEntry)
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assert(GOTEntry == Value &&
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"GOT entry has two different addresses.");
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else
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writeBytesUnaligned(Value, LocalGOTAddr, 8);
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return (SymOffset - 0x7ff0) & 0xffff;
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}
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case ELF::R_MIPS_GOT_OFST: {
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int64_t page = (Value + Addend + 0x8000) & ~0xffff;
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return (Value + Addend - page) & 0xffff;
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}
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case ELF::R_MIPS_GPREL32: {
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uint64_t GOTAddr = getSectionLoadAddress(SectionToGOTMap[SectionID]);
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return Value + Addend - (GOTAddr + 0x7ff0);
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}
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case ELF::R_MIPS_PC16: {
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uint64_t FinalAddress = (Section.LoadAddress + Offset);
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return ((Value + Addend - FinalAddress - 4) >> 2) & 0xffff;
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}
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case ELF::R_MIPS_PC18_S3: {
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uint64_t FinalAddress = (Section.LoadAddress + Offset);
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return ((Value + Addend - ((FinalAddress | 7) ^ 7)) >> 3) & 0x3ffff;
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}
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case ELF::R_MIPS_PC19_S2: {
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uint64_t FinalAddress = (Section.LoadAddress + Offset);
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return ((Value + Addend - FinalAddress) >> 2) & 0x7ffff;
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}
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case ELF::R_MIPS_PC21_S2: {
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uint64_t FinalAddress = (Section.LoadAddress + Offset);
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return ((Value + Addend - FinalAddress) >> 2) & 0x1fffff;
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}
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case ELF::R_MIPS_PC26_S2: {
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uint64_t FinalAddress = (Section.LoadAddress + Offset);
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return ((Value + Addend - FinalAddress) >> 2) & 0x3ffffff;
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}
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case ELF::R_MIPS_PCHI16: {
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uint64_t FinalAddress = (Section.LoadAddress + Offset);
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return ((Value + Addend - FinalAddress + 0x8000) >> 16) & 0xffff;
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}
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case ELF::R_MIPS_PCLO16: {
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uint64_t FinalAddress = (Section.LoadAddress + Offset);
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return (Value + Addend - FinalAddress) & 0xffff;
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}
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}
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return 0;
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}
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void RuntimeDyldELF::applyMIPS64Relocation(uint8_t *TargetPtr,
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int64_t CalculatedValue,
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uint32_t Type) {
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uint32_t Insn = readBytesUnaligned(TargetPtr, 4);
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switch (Type) {
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default:
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break;
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case ELF::R_MIPS_32:
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case ELF::R_MIPS_GPREL32:
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writeBytesUnaligned(CalculatedValue & 0xffffffff, TargetPtr, 4);
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break;
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case ELF::R_MIPS_64:
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case ELF::R_MIPS_SUB:
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writeBytesUnaligned(CalculatedValue, TargetPtr, 8);
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break;
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case ELF::R_MIPS_26:
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case ELF::R_MIPS_PC26_S2:
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Insn = (Insn & 0xfc000000) | CalculatedValue;
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writeBytesUnaligned(Insn, TargetPtr, 4);
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break;
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case ELF::R_MIPS_GPREL16:
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Insn = (Insn & 0xffff0000) | (CalculatedValue & 0xffff);
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writeBytesUnaligned(Insn, TargetPtr, 4);
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break;
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case ELF::R_MIPS_HI16:
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case ELF::R_MIPS_LO16:
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case ELF::R_MIPS_PCHI16:
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case ELF::R_MIPS_PCLO16:
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case ELF::R_MIPS_PC16:
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case ELF::R_MIPS_CALL16:
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case ELF::R_MIPS_GOT_DISP:
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case ELF::R_MIPS_GOT_PAGE:
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case ELF::R_MIPS_GOT_OFST:
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Insn = (Insn & 0xffff0000) | CalculatedValue;
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writeBytesUnaligned(Insn, TargetPtr, 4);
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break;
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case ELF::R_MIPS_PC18_S3:
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Insn = (Insn & 0xfffc0000) | CalculatedValue;
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writeBytesUnaligned(Insn, TargetPtr, 4);
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break;
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case ELF::R_MIPS_PC19_S2:
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Insn = (Insn & 0xfff80000) | CalculatedValue;
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writeBytesUnaligned(Insn, TargetPtr, 4);
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break;
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case ELF::R_MIPS_PC21_S2:
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Insn = (Insn & 0xffe00000) | CalculatedValue;
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writeBytesUnaligned(Insn, TargetPtr, 4);
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break;
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}
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}
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// Return the .TOC. section and offset.
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void RuntimeDyldELF::findPPC64TOCSection(const ObjectFile &Obj,
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ObjSectionToIDMap &LocalSections,
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@ -784,13 +977,13 @@ void RuntimeDyldELF::resolveRelocation(const RelocationEntry &RE,
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uint64_t Value) {
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const SectionEntry &Section = Sections[RE.SectionID];
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return resolveRelocation(Section, RE.Offset, Value, RE.RelType, RE.Addend,
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RE.SymOffset);
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RE.SymOffset, RE.SectionID);
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}
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void RuntimeDyldELF::resolveRelocation(const SectionEntry &Section,
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uint64_t Offset, uint64_t Value,
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uint32_t Type, int64_t Addend,
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uint64_t SymOffset) {
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uint64_t SymOffset, SID SectionID) {
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switch (Arch) {
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case Triple::x86_64:
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resolveX86_64Relocation(Section, Offset, Value, Type, Addend, SymOffset);
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@ -812,8 +1005,16 @@ void RuntimeDyldELF::resolveRelocation(const SectionEntry &Section,
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break;
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case Triple::mips: // Fall through.
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case Triple::mipsel:
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resolveMIPSRelocation(Section, Offset, (uint32_t)(Value & 0xffffffffL),
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Type, (uint32_t)(Addend & 0xffffffffL));
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case Triple::mips64:
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case Triple::mips64el:
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if (IsMipsO32ABI)
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resolveMIPSRelocation(Section, Offset, (uint32_t)(Value & 0xffffffffL),
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Type, (uint32_t)(Addend & 0xffffffffL));
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else if (IsMipsN64ABI)
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resolveMIPS64Relocation(Section, Offset, Value, Type, Addend, SymOffset,
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SectionID);
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else
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llvm_unreachable("Mips ABI not handled");
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break;
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case Triple::ppc64: // Fall through.
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case Triple::ppc64le:
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@ -999,7 +1200,7 @@ relocation_iterator RuntimeDyldELF::processRelocationRef(
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}
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processSimpleRelocation(SectionID, Offset, RelType, Value);
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}
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} else if ((Arch == Triple::mipsel || Arch == Triple::mips)) {
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} else if (IsMipsO32ABI) {
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uint32_t *Placeholder = reinterpret_cast<uint32_t*>(computePlaceholderAddress(SectionID, Offset));
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if (RelType == ELF::R_MIPS_26) {
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// This is an Mips branch relocation, need to use a stub function.
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@ -1054,6 +1255,23 @@ relocation_iterator RuntimeDyldELF::processRelocationRef(
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Value.Addend += *Placeholder;
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processSimpleRelocation(SectionID, Offset, RelType, Value);
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}
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} else if (IsMipsN64ABI) {
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uint32_t r_type = RelType & 0xff;
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RelocationEntry RE(SectionID, Offset, RelType, Value.Addend);
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if (r_type == ELF::R_MIPS_CALL16 || r_type == ELF::R_MIPS_GOT_PAGE
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|| r_type == ELF::R_MIPS_GOT_DISP) {
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StringMap<uint64_t>::iterator i = GOTSymbolOffsets.find(TargetName);
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if (i != GOTSymbolOffsets.end())
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RE.SymOffset = i->second;
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else {
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RE.SymOffset = allocateGOTEntries(SectionID, 1);
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GOTSymbolOffsets[TargetName] = RE.SymOffset;
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}
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}
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if (Value.SymbolName)
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addRelocationForSymbol(RE, Value.SymbolName);
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else
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addRelocationForSection(RE, Value.SectionID);
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} else if (Arch == Triple::ppc64 || Arch == Triple::ppc64le) {
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if (RelType == ELF::R_PPC64_REL24) {
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// Determine ABI variant in use for this object.
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@ -1356,9 +1574,18 @@ size_t RuntimeDyldELF::getGOTEntrySize() {
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case Triple::x86:
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case Triple::arm:
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case Triple::thumb:
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Result = sizeof(uint32_t);
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break;
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case Triple::mips:
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case Triple::mipsel:
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Result = sizeof(uint32_t);
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case Triple::mips64:
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case Triple::mips64el:
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if (IsMipsO32ABI)
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Result = sizeof(uint32_t);
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else if (IsMipsN64ABI)
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Result = sizeof(uint64_t);
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else
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llvm_unreachable("Mips ABI not handled");
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break;
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default:
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llvm_unreachable("Unsupported CPU type!");
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@ -1413,6 +1640,20 @@ void RuntimeDyldELF::finalizeLoad(const ObjectFile &Obj,
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// For now, initialize all GOT entries to zero. We'll fill them in as
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// needed when GOT-based relocations are applied.
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memset(Addr, 0, TotalSize);
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if (IsMipsN64ABI) {
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// To correctly resolve Mips GOT relocations, we need a mapping from
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// object's sections to GOTs.
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for (section_iterator SI = Obj.section_begin(), SE = Obj.section_end();
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SI != SE; ++SI) {
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if (SI->relocation_begin() != SI->relocation_end()) {
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section_iterator RelocatedSection = SI->getRelocatedSection();
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ObjSectionToIDMap::iterator i = SectionMap.find(*RelocatedSection);
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assert (i != SectionMap.end());
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SectionToGOTMap[i->second] = GOTSectionID;
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}
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}
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GOTSymbolOffsets.clear();
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}
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}
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// Look for and record the EH frame section.
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@ -25,7 +25,7 @@ class RuntimeDyldELF : public RuntimeDyldImpl {
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void resolveRelocation(const SectionEntry &Section, uint64_t Offset,
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uint64_t Value, uint32_t Type, int64_t Addend,
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uint64_t SymOffset = 0);
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uint64_t SymOffset = 0, SID SectionID = 0);
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void resolveX86_64Relocation(const SectionEntry &Section, uint64_t Offset,
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uint64_t Value, uint32_t Type, int64_t Addend,
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@ -49,12 +49,24 @@ class RuntimeDyldELF : public RuntimeDyldImpl {
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void resolveSystemZRelocation(const SectionEntry &Section, uint64_t Offset,
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uint64_t Value, uint32_t Type, int64_t Addend);
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void resolveMIPS64Relocation(const SectionEntry &Section, uint64_t Offset,
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uint64_t Value, uint32_t Type, int64_t Addend,
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uint64_t SymOffset, SID SectionID);
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int64_t evaluateMIPS64Relocation(const SectionEntry &Section,
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uint64_t Offset, uint64_t Value,
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uint32_t Type, int64_t Addend,
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uint64_t SymOffset, SID SectionID);
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void applyMIPS64Relocation(uint8_t *TargetPtr, int64_t CalculatedValue,
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uint32_t Type);
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unsigned getMaxStubSize() override {
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if (Arch == Triple::aarch64 || Arch == Triple::aarch64_be)
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return 20; // movz; movk; movk; movk; br
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if (Arch == Triple::arm || Arch == Triple::thumb)
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return 8; // 32-bit instruction and 32-bit address
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else if (Arch == Triple::mipsel || Arch == Triple::mips)
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else if (IsMipsO32ABI)
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return 16;
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else if (Arch == Triple::ppc64 || Arch == Triple::ppc64le)
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return 44;
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@ -73,6 +85,8 @@ class RuntimeDyldELF : public RuntimeDyldImpl {
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return 1;
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}
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void setMipsABI(const ObjectFile &Obj) override;
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void findPPC64TOCSection(const ObjectFile &Obj,
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ObjSectionToIDMap &LocalSections,
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RelocationValueRef &Rel);
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@ -114,6 +128,13 @@ class RuntimeDyldELF : public RuntimeDyldImpl {
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// that consume more than one slot)
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unsigned CurrentGOTIndex;
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// A map from section to a GOT section that has entries for section's GOT
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// relocations. (Mips64 specific)
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DenseMap<SID, SID> SectionToGOTMap;
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// A map to avoid duplicate got entries (Mips64 specific)
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StringMap<uint64_t> GOTSymbolOffsets;
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// When a module is loaded we save the SectionID of the EH frame section
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// in a table until we receive a request to register all unregistered
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// EH frame sections with the memory manager.
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@ -236,6 +236,8 @@ protected:
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Triple::ArchType Arch;
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bool IsTargetLittleEndian;
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bool IsMipsO32ABI;
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bool IsMipsN64ABI;
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// True if all sections should be passed to the memory manager, false if only
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// sections containing relocations should be. Defaults to 'false'.
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@ -303,6 +305,11 @@ protected:
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*(Addr + 7) = Value & 0xFF;
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}
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|
||||
virtual void setMipsABI(const ObjectFile &Obj) {
|
||||
IsMipsO32ABI = false;
|
||||
IsMipsN64ABI = false;
|
||||
}
|
||||
|
||||
/// Endian-aware read Read the least significant Size bytes from Src.
|
||||
uint64_t readBytesUnaligned(uint8_t *Src, unsigned Size) const;
|
||||
|
||||
|
||||
@ -23,9 +23,9 @@ extern "C" void LLVMInitializeMipsTargetInfo() {
|
||||
/*HasJIT=*/true> Y(TheMipselTarget, "mipsel", "Mipsel");
|
||||
|
||||
RegisterTarget<Triple::mips64,
|
||||
/*HasJIT=*/false> A(TheMips64Target, "mips64", "Mips64 [experimental]");
|
||||
/*HasJIT=*/true> A(TheMips64Target, "mips64", "Mips64 [experimental]");
|
||||
|
||||
RegisterTarget<Triple::mips64el,
|
||||
/*HasJIT=*/false> B(TheMips64elTarget,
|
||||
/*HasJIT=*/true> B(TheMips64elTarget,
|
||||
"mips64el", "Mips64el [experimental]");
|
||||
}
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -extra-module=%p/Inputs/cross-module-b.ll -relocation-model=pic -code-model=small %s > /dev/null
|
||||
; XFAIL: mips, i686, i386
|
||||
; XFAIL: mips-, mipsel-, i686, i386
|
||||
|
||||
declare i32 @FB()
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -relocation-model=pic -code-model=large %s
|
||||
; XFAIL: cygwin, win32, mingw, mips, i686, i386, aarch64, arm, asan, msan
|
||||
; XFAIL: cygwin, win32, mingw, mips-, mipsel-, i686, i386, aarch64, arm, asan, msan
|
||||
declare i8* @__cxa_allocate_exception(i64)
|
||||
declare void @__cxa_throw(i8*, i8*, i8*)
|
||||
declare i32 @__gxx_personality_v0(...)
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -relocation-model=pic -code-model=small %s
|
||||
; XFAIL: cygwin, win32, mingw, mips, i686, i386, darwin, aarch64, arm, asan, msan
|
||||
; XFAIL: cygwin, win32, mingw, mips-, mipsel-, i686, i386, darwin, aarch64, arm, asan, msan
|
||||
declare i8* @__cxa_allocate_exception(i64)
|
||||
declare void @__cxa_throw(i8*, i8*, i8*)
|
||||
declare i32 @__gxx_personality_v0(...)
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -relocation-model=pic -code-model=small %s > /dev/null
|
||||
; XFAIL: mips, i686, i386
|
||||
; XFAIL: mips-, mipsel-, i686, i386
|
||||
|
||||
declare i32 @FB()
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -extra-module=%p/Inputs/cross-module-b.ll -disable-lazy-compilation=true -remote-mcjit -mcjit-remote-process=lli-child-target%exeext -relocation-model=pic -code-model=small %s > /dev/null
|
||||
; XFAIL: mips, i686, i386, arm
|
||||
; XFAIL: mips-, mipsel-, i686, i386, arm
|
||||
|
||||
declare i32 @FB()
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -disable-lazy-compilation=true -remote-mcjit -mcjit-remote-process=lli-child-target%exeext -relocation-model=pic -code-model=small %s > /dev/null
|
||||
; XFAIL: mips, i686, i386, arm
|
||||
; XFAIL: mips-, mipsel-, i686, i386, arm
|
||||
|
||||
declare i32 @FB()
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -remote-mcjit -relocation-model=pic -code-model=small %s > /dev/null
|
||||
; XFAIL: mips, aarch64, arm, i686, i386
|
||||
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
|
||||
|
||||
@count = global i32 1, align 4
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -remote-mcjit -O0 -relocation-model=pic -code-model=small %s
|
||||
; XFAIL: mips, aarch64, arm, i686, i386
|
||||
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
|
||||
|
||||
@.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
|
||||
@ptr = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), align 4
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -disable-lazy-compilation=false -relocation-model=pic -code-model=small %s
|
||||
; XFAIL: mips, i686, i386, aarch64, arm
|
||||
; XFAIL: mips-, mipsel-, i686, i386, aarch64, arm
|
||||
|
||||
define i32 @main() nounwind {
|
||||
entry:
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -relocation-model=pic -code-model=small %s > /dev/null
|
||||
; XFAIL: mips, aarch64, arm, i686, i386
|
||||
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
|
||||
|
||||
@count = global i32 1, align 4
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -O0 -relocation-model=pic -code-model=small %s
|
||||
; XFAIL: mips, aarch64, arm, i686, i386
|
||||
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
|
||||
|
||||
@.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
|
||||
@ptr = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), align 4
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -jit-kind=orc-mcjit -extra-module=%p/Inputs/cross-module-b.ll -relocation-model=pic -code-model=small %s > /dev/null
|
||||
; XFAIL: mips, i686, i386
|
||||
; XFAIL: mips-, mipsel-, i686, i386
|
||||
|
||||
declare i32 @FB()
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -jit-kind=orc-mcjit -relocation-model=pic -code-model=large %s
|
||||
; XFAIL: cygwin, win32, mingw, mips, i686, i386, aarch64, arm, asan, msan
|
||||
; XFAIL: cygwin, win32, mingw, mips-, mipsel-, i686, i386, aarch64, arm, asan, msan
|
||||
declare i8* @__cxa_allocate_exception(i64)
|
||||
declare void @__cxa_throw(i8*, i8*, i8*)
|
||||
declare i32 @__gxx_personality_v0(...)
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -jit-kind=orc-mcjit -relocation-model=pic -code-model=small %s
|
||||
; XFAIL: cygwin, win32, mingw, mips, i686, i386, darwin, aarch64, arm, asan, msan
|
||||
; XFAIL: cygwin, win32, mingw, mips-, mipsel-, i686, i386, darwin, aarch64, arm, asan, msan
|
||||
declare i8* @__cxa_allocate_exception(i64)
|
||||
declare void @__cxa_throw(i8*, i8*, i8*)
|
||||
declare i32 @__gxx_personality_v0(...)
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -jit-kind=orc-mcjit -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -relocation-model=pic -code-model=small %s > /dev/null
|
||||
; XFAIL: mips, i686, i386
|
||||
; XFAIL: mips-, mipsel-, i686, i386
|
||||
|
||||
declare i32 @FB()
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -jit-kind=orc-mcjit -extra-module=%p/Inputs/cross-module-b.ll -disable-lazy-compilation=true -remote-mcjit -mcjit-remote-process=lli-child-target%exeext -relocation-model=pic -code-model=small %s > /dev/null
|
||||
; XFAIL: mips, i686, i386, arm
|
||||
; XFAIL: mips-, mipsel-, i686, i386, arm
|
||||
|
||||
declare i32 @FB()
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -jit-kind=orc-mcjit -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -disable-lazy-compilation=true -remote-mcjit -mcjit-remote-process=lli-child-target%exeext -relocation-model=pic -code-model=small %s > /dev/null
|
||||
; XFAIL: mips, i686, i386, arm
|
||||
; XFAIL: mips-, mipsel-, i686, i386, arm
|
||||
|
||||
declare i32 @FB()
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -jit-kind=orc-mcjit -remote-mcjit -relocation-model=pic -code-model=small %s > /dev/null
|
||||
; XFAIL: mips, aarch64, arm, i686, i386
|
||||
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
|
||||
|
||||
@count = global i32 1, align 4
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -jit-kind=orc-mcjit -remote-mcjit -O0 -relocation-model=pic -code-model=small %s
|
||||
; XFAIL: mips, aarch64, arm, i686, i386
|
||||
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
|
||||
|
||||
@.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
|
||||
@ptr = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), align 4
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -jit-kind=orc-mcjit -disable-lazy-compilation=false -relocation-model=pic -code-model=small %s
|
||||
; XFAIL: mips, i686, i386, aarch64, arm
|
||||
; XFAIL: mips-, mipsel-, i686, i386, aarch64, arm
|
||||
|
||||
define i32 @main() nounwind {
|
||||
entry:
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -jit-kind=orc-mcjit -relocation-model=pic -code-model=small %s > /dev/null
|
||||
; XFAIL: mips, aarch64, arm, i686, i386
|
||||
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
|
||||
|
||||
@count = global i32 1, align 4
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; RUN: %lli -jit-kind=orc-mcjit -O0 -relocation-model=pic -code-model=small %s
|
||||
; XFAIL: mips, aarch64, arm, i686, i386
|
||||
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
|
||||
|
||||
@.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
|
||||
@ptr = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), align 4
|
||||
|
||||
@ -0,0 +1,155 @@
|
||||
# RUN: llvm-mc -triple=mips64el-unknown-linux -relocation-model=pic -code-model=small -filetype=obj -o %T/test_ELF_Mips64N64.o %s
|
||||
# RUN: llc -mtriple=mips64el-unknown-linux -relocation-model=pic -filetype=obj -o %T/test_ELF_ExternalFunction_Mips64N64.o %S/Inputs/ExternalFunction.ll
|
||||
# RUN: llvm-rtdyld -triple=mips64el-unknown-linux -verify -map-section test_ELF_Mips64N64.o,.text=0x1000 -map-section test_ELF_ExternalFunction_Mips64N64.o,.text=0x10000 -check=%s %/T/test_ELF_Mips64N64.o %T/test_ELF_ExternalFunction_Mips64N64.o
|
||||
|
||||
.text
|
||||
.abicalls
|
||||
.section .mdebug.abi64,"",@progbits
|
||||
.nan legacy
|
||||
.file "ELF_Mips64N64_PIC_relocations.ll"
|
||||
.text
|
||||
.globl bar
|
||||
.align 3
|
||||
.type bar,@function
|
||||
.set nomicromips
|
||||
.set nomips16
|
||||
.ent bar
|
||||
bar:
|
||||
.frame $fp,40,$ra
|
||||
.mask 0x00000000,0
|
||||
.fmask 0x00000000,0
|
||||
.set noreorder
|
||||
.set nomacro
|
||||
.set noat
|
||||
daddiu $sp, $sp, -40
|
||||
sd $ra, 32($sp)
|
||||
sd $fp, 24($sp)
|
||||
move $fp, $sp
|
||||
sd $4, 16($fp)
|
||||
lb $2, 0($4)
|
||||
sd $4, 8($fp)
|
||||
|
||||
# Test R_MIPS_26 relocation.
|
||||
# rtdyld-check: decode_operand(insn1, 0)[25:0] = foo
|
||||
insn1:
|
||||
jal foo
|
||||
nop
|
||||
|
||||
# Test R_MIPS_PC16 relocation.
|
||||
# rtdyld-check: decode_operand(insn2, 1)[15:0] = foo - insn2
|
||||
insn2:
|
||||
bal foo
|
||||
nop
|
||||
|
||||
move $sp, $fp
|
||||
ld $ra, 32($sp)
|
||||
ld $fp, 24($sp)
|
||||
daddiu $sp, $sp, 32
|
||||
jr $ra
|
||||
nop
|
||||
.set at
|
||||
.set macro
|
||||
.set reorder
|
||||
.end bar
|
||||
$func_end0:
|
||||
.size bar, ($func_end0)-bar
|
||||
|
||||
.globl main
|
||||
.align 3
|
||||
.type main,@function
|
||||
.set nomicromips
|
||||
.set nomips16
|
||||
.ent main
|
||||
main:
|
||||
.frame $fp,32,$ra
|
||||
.mask 0x00000000,0
|
||||
.fmask 0x00000000,0
|
||||
.set noreorder
|
||||
.set nomacro
|
||||
.set noat
|
||||
daddiu $sp, $sp, -32
|
||||
sd $ra, 24($sp)
|
||||
sd $fp, 16($sp)
|
||||
sd $gp, 8($sp)
|
||||
move $fp, $sp
|
||||
|
||||
# Check upper 16-bits of offset between the address of main function
|
||||
# and the global offset table.
|
||||
# rtdyld-check: decode_operand(insn3, 1)[15:0] = ((section_addr(test_ELF_Mips64N64.o, .got) + 0x7ff0) - main + 0x8000)[31:16]
|
||||
insn3:
|
||||
lui $1, %hi(%neg(%gp_rel(main)))
|
||||
daddu $1, $1, $25
|
||||
|
||||
# Check lower 16-bits of offset between the address of main function
|
||||
# and the global offset table.
|
||||
# rtdyld-check: decode_operand(insn4, 2)[15:0] = ((section_addr(test_ELF_Mips64N64.o, .got) + 0x7ff0) - main)[15:0]
|
||||
insn4:
|
||||
daddiu $1, $1, %lo(%neg(%gp_rel(main)))
|
||||
sw $zero, 4($fp)
|
||||
|
||||
# $gp register contains address of the .got section + 0x7FF0. 0x7FF0 is
|
||||
# the offset of $gp from the beginning of the .got section. Check that we are
|
||||
# loading address of the page pointer from correct offset. In this case
|
||||
# the page pointer is the first entry in the .got section, so offset will be
|
||||
# 0 - 0x7FF0.
|
||||
# rtdyld-check: decode_operand(insn5, 2)[15:0] = 0x8010
|
||||
#
|
||||
# Check that the global offset table contains the page pointer.
|
||||
# rtdyld-check: *{8}(section_addr(test_ELF_Mips64N64.o, .got)) = (_str + 0x8000) & 0xffffffffffff0000
|
||||
insn5:
|
||||
ld $25, %got_page(_str)($1)
|
||||
|
||||
# Check the offset of _str from the page pointer.
|
||||
# rtdyld-check: decode_operand(insn6, 2)[15:0] = _str[15:0]
|
||||
insn6:
|
||||
daddiu $25, $25, %got_ofst(_str)
|
||||
|
||||
# Check that we are loading address of var from correct offset. In this case
|
||||
# var is the second entry in the .got section, so offset will be 8 - 0x7FF0.
|
||||
# rtdyld-check: decode_operand(insn7, 2)[15:0] = 0x8018
|
||||
#
|
||||
# Check that the global offset table contains the address of the var.
|
||||
# rtdyld-check: *{8}(section_addr(test_ELF_Mips64N64.o, .got) + 8) = var
|
||||
insn7:
|
||||
ld $2, %got_disp(var)($1)
|
||||
sd $25, 0($2)
|
||||
|
||||
# Check that we are loading address of bar from correct offset. In this case
|
||||
# bar is the third entry in the .got section, so offset will be 16 - 0x7FF0.
|
||||
# rtdyld-check: decode_operand(insn8, 2)[15:0] = 0x8020
|
||||
#
|
||||
# Check that the global offset table contains the address of the bar.
|
||||
# rtdyld-check: *{8}(section_addr(test_ELF_Mips64N64.o, .got) + 16) = bar
|
||||
insn8:
|
||||
ld $2, %call16(bar)($1)
|
||||
|
||||
move $4, $25
|
||||
move $gp, $1
|
||||
move $25, $2
|
||||
jalr $25
|
||||
nop
|
||||
move $sp, $fp
|
||||
ld $gp, 8($sp)
|
||||
ld $fp, 16($sp)
|
||||
ld $ra, 24($sp)
|
||||
daddiu $sp, $sp, 32
|
||||
jr $ra
|
||||
nop
|
||||
.set at
|
||||
.set macro
|
||||
.set reorder
|
||||
.end main
|
||||
$func_end1:
|
||||
.size main, ($func_end1)-main
|
||||
|
||||
.type _str,@object
|
||||
.section .rodata.str1.1,"aMS",@progbits,1
|
||||
_str:
|
||||
.asciz "test"
|
||||
.size _str, 5
|
||||
|
||||
.type var,@object
|
||||
.comm var,8,8
|
||||
|
||||
.section ".note.GNU-stack","",@progbits
|
||||
.text
|
||||
@ -0,0 +1,4 @@
|
||||
define void @foo() {
|
||||
entry:
|
||||
ret void
|
||||
}
|
||||
3
test/ExecutionEngine/RuntimeDyld/Mips/lit.local.cfg
Normal file
3
test/ExecutionEngine/RuntimeDyld/Mips/lit.local.cfg
Normal file
@ -0,0 +1,3 @@
|
||||
if not 'Mips' in config.root.targets:
|
||||
config.unsupported = True
|
||||
|
||||
@ -127,6 +127,8 @@ protected:
|
||||
SupportedArchs.push_back(Triple::aarch64);
|
||||
SupportedArchs.push_back(Triple::arm);
|
||||
SupportedArchs.push_back(Triple::mips);
|
||||
SupportedArchs.push_back(Triple::mips64);
|
||||
SupportedArchs.push_back(Triple::mips64el);
|
||||
SupportedArchs.push_back(Triple::x86);
|
||||
SupportedArchs.push_back(Triple::x86_64);
|
||||
|
||||
|
||||
@ -298,6 +298,8 @@ protected:
|
||||
SupportedArchs.push_back(Triple::arm);
|
||||
SupportedArchs.push_back(Triple::mips);
|
||||
SupportedArchs.push_back(Triple::mipsel);
|
||||
SupportedArchs.push_back(Triple::mips64);
|
||||
SupportedArchs.push_back(Triple::mips64el);
|
||||
SupportedArchs.push_back(Triple::x86);
|
||||
SupportedArchs.push_back(Triple::x86_64);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user