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Minor cleanup related to my latest scheduler changes.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122545 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick
2010-12-24 07:10:19 +00:00
parent 24312230ad
commit a75ce9f5d2
2 changed files with 6 additions and 4 deletions
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2
include/llvm/CodeGen/ScheduleDAG.h
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@@ -328,7 +328,7 @@ namespace llvm {
/// isInstr - Return true if this SUnit refers to a machine instruction as
/// opposed to an SDNode.
bool isInstr() const { return !Node; }
bool isInstr() const { return Instr; }
/// setInstr - Assign the instruction for the SUnit.
/// This may be used during post-regalloc scheduling.

8
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
View File

@@ -348,7 +348,10 @@ void ScheduleDAGRRList::ReleasePredecessors(SUnit *SU) {
/// Check to see if any of the pending instructions are ready to issue. If
/// so, add them to the available queue.
void ScheduleDAGRRList::ReleasePending() {
assert(!EnableSchedCycles && "requires --enable-sched-cycles" );
if (!EnableSchedCycles) {
assert(PendingQueue.empty() && "pending instrs not allowed in this mode");
return;
}
// If the available queue is empty, it is safe to reset MinAvailableCycle.
if (AvailableQueue->empty())
@@ -634,8 +637,7 @@ void ScheduleDAGRRList::BacktrackBottomUp(SUnit *SU, SUnit *BtSU) {
RestoreHazardCheckerBottomUp();
if (EnableSchedCycles)
ReleasePending();
ReleasePending();
++NumBacktracks;
}