mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-23 02:29:18 +00:00
Avoid folding ADD instructions with FI operands.
PEI can't handle the pseudo-instructions. This can be removed when the pseudo-instructions are replaced by normal predicated instructions. Fixes PR13628. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162130 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
72e9b6aeb4
commit
a7fb3f6804
@ -1583,6 +1583,9 @@ static unsigned canFoldIntoMOVCC(unsigned Reg, MachineInstr *&MI,
|
||||
// predicated instructions which will be reading CPSR.
|
||||
for (unsigned i = 1, e = MI->getNumOperands(); i != e; ++i) {
|
||||
const MachineOperand &MO = MI->getOperand(i);
|
||||
// Reject frame index operands, PEI can't handle the predicated pseudos.
|
||||
if (MO.isFI() || MO.isCPI() || MO.isJTI())
|
||||
return 0;
|
||||
if (!MO.isReg())
|
||||
continue;
|
||||
if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
|
||||
|
@ -179,3 +179,14 @@ define i32 @t12(i32 %a, i32 %b) nounwind {
|
||||
%tmp1 = select i1 %cond, i32 %a, i32 %x
|
||||
ret i32 %tmp1
|
||||
}
|
||||
|
||||
; Handle frame index operands.
|
||||
define void @pr13628() nounwind uwtable align 2 {
|
||||
%x3 = alloca i8, i32 256, align 8
|
||||
%x4 = load i8* undef, align 1
|
||||
%x5 = icmp ne i8 %x4, 0
|
||||
%x6 = select i1 %x5, i8* %x3, i8* null
|
||||
call void @bar(i8* %x6) nounwind
|
||||
ret void
|
||||
}
|
||||
declare void @bar(i8*)
|
||||
|
Loading…
Reference in New Issue
Block a user