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R600/SI: Add patterns for 64-bit shift operations

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Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182284 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2013-05-20 15:02:12 +00:00
parent fbdd318120
commit a9d5d0b346
3 changed files with 25 additions and 3 deletions
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13
lib/Target/R600/SIInstrInfo.td
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@ -263,6 +263,19 @@ class VOP3_32 <bits<9> op, string opName, list<dag> pattern> : VOP3 <
opName#" $dst, $src0, $src1, $src2, $abs, $clamp, $omod, $neg", pattern
>, VOP <opName>;
class VOP3_64_Shift <bits <9> op, string opName, list<dag> pattern> : VOP3 <
op, (outs VReg_64:$dst),
(ins VSrc_64:$src0, VSrc_32:$src1),
opName#" $dst, $src0, $src1", pattern
>, VOP <opName> {
let src2 = SIOperand.ZERO;
let abs = 0;
let clamp = 0;
let omod = 0;
let neg = 0;
}
class VOP3_64 <bits<9> op, string opName, list<dag> pattern> : VOP3 <
op, (outs VReg_64:$dst),
(ins VSrc_64:$src0, VSrc_64:$src1, VSrc_64:$src2,

12
lib/Target/R600/SIInstructions.td
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@ -982,9 +982,15 @@ def V_SAD_U32 : VOP3_32 <0x0000015d, "V_SAD_U32", []>;
////def V_CVT_PK_U8_F32 : VOP3_U8 <0x0000015e, "V_CVT_PK_U8_F32", []>;
def V_DIV_FIXUP_F32 : VOP3_32 <0x0000015f, "V_DIV_FIXUP_F32", []>;
def V_DIV_FIXUP_F64 : VOP3_64 <0x00000160, "V_DIV_FIXUP_F64", []>;
def V_LSHL_B64 : VOP3_64 <0x00000161, "V_LSHL_B64", []>;
def V_LSHR_B64 : VOP3_64 <0x00000162, "V_LSHR_B64", []>;
def V_ASHR_I64 : VOP3_64 <0x00000163, "V_ASHR_I64", []>;
def V_LSHL_B64 : VOP3_64_Shift <0x00000161, "V_LSHL_B64",
[(set i64:$dst, (shl i64:$src0, i32:$src1))]
>;
def V_LSHR_B64 : VOP3_64_Shift <0x00000162, "V_LSHR_B64",
[(set i64:$dst, (srl i64:$src0, i32:$src1))]
>;
def V_ASHR_I64 : VOP3_64_Shift <0x00000163, "V_ASHR_I64", []>;
def V_ADD_F64 : VOP3_64 <0x00000164, "V_ADD_F64", []>;
def V_MUL_F64 : VOP3_64 <0x00000165, "V_MUL_F64", []>;
def V_MIN_F64 : VOP3_64 <0x00000166, "V_MIN_F64", []>;

3
test/CodeGen/R600/shl.ll
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@ -11,3 +11,6 @@ define void @shl_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> %a, <4 x i32> %b)
store <4 x i32> %result, <4 x i32> addrspace(1)* %out
ret void
}
; XXX: Add SI test for i64 shl once i64 stores and i64 function arguments are
; supported.