Thumb2 parsing and encoding for ISB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139200 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-09-06 22:53:27 +00:00
parent 8f6d8104fc
commit aa833e53dc
2 changed files with 17 additions and 8 deletions

View File

@ -2794,20 +2794,19 @@ def t2DMB : AInoP<(outs), (ins memb_opt:$opt), ThumbFrm, NoItinerary,
}
def t2DSB : AInoP<(outs), (ins memb_opt:$opt), ThumbFrm, NoItinerary,
"dsb", "\t$opt",
[/* For disassembly only; pattern left blank */]>,
"dsb", "\t$opt", []>,
Requires<[IsThumb, HasDB]> {
bits<4> opt;
let Inst{31-4} = 0xf3bf8f4;
let Inst{3-0} = opt;
}
// ISB has only full system option -- for disassembly only
def t2ISB : AInoP<(outs), (ins), ThumbFrm, NoItinerary, "isb", "",
[/* For disassembly only; pattern left blank */]>,
Requires<[IsThumb2, HasV7]> {
def t2ISB : AInoP<(outs), (ins memb_opt:$opt), ThumbFrm, NoItinerary,
"isb", "\t$opt",
[]>, Requires<[IsThumb2, HasV7]> {
bits<4> opt;
let Inst{31-4} = 0xf3bf8f6;
let Inst{3-0} = 0b1111;
let Inst{3-0} = opt;
}
class T2I_ldrex<bits<2> opcod, dag oops, dag iops, AddrMode am, int sz,
@ -3591,4 +3590,4 @@ def : t2InstAlias<"tst${p} $Rn, $Rm",
// Memory barriers
def : InstAlias<"dmb", (t2DMB 0xf)>, Requires<[IsThumb2, HasDB]>;
def : InstAlias<"dsb", (t2DSB 0xf)>, Requires<[IsThumb2, HasDB]>;
//def : InstAlias<"isb", (t2ISB 0xf)>, Requires<[IsThumb2, HasDB]>;
def : InstAlias<"isb", (t2ISB 0xf)>, Requires<[IsThumb2, HasDB]>;

View File

@ -452,6 +452,16 @@ _func:
@ CHECK: eor.w r4, r5, r6, ror #5 @ encoding: [0x85,0xea,0x76,0x14]
@------------------------------------------------------------------------------
@ ISB
@------------------------------------------------------------------------------
isb sy
isb
@ CHECK: isb sy @ encoding: [0xbf,0xf3,0x6f,0x8f]
@ CHECK: isb sy @ encoding: [0xbf,0xf3,0x6f,0x8f]
@------------------------------------------------------------------------------
@ IT
@------------------------------------------------------------------------------