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Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71975 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -468,7 +468,7 @@ SDValue MSP430TargetLowering::LowerShifts(SDValue Op,
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}
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while (ShiftAmount--)
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Victim = DAG.getNode((Opc == ISD::SRA ? MSP430ISD::RRA : MSP430ISD::RLA),
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Victim = DAG.getNode((Opc == ISD::SHL ? MSP430ISD::RLA : MSP430ISD::RRA),
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dl, VT, Victim);
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return Victim;
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@ -624,12 +624,12 @@ def SHL16r1 : Pseudo<(outs GR16:$dst), (ins GR16:$src),
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(implicit SRW)]>;
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def SAR8r1c : Pseudo<(outs GR8:$dst), (ins GR8:$src),
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"clrc\n"
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"clrc\n\t"
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"rrc.b\t$dst",
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[(set GR8:$dst, (MSP430rrc GR8:$src)),
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(implicit SRW)]>;
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def SAR16r1c : Pseudo<(outs GR16:$dst), (ins GR16:$src),
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"clrc\n"
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"clrc\n\t"
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"rrc.w\t$dst",
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[(set GR16:$dst, (MSP430rrc GR16:$src)),
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(implicit SRW)]>;
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15
test/CodeGen/MSP430/2009-05-17-Shift.ll
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15
test/CodeGen/MSP430/2009-05-17-Shift.ll
Normal file
@ -0,0 +1,15 @@
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; RUN: llvm-as < %s | llc -march=msp430 | grep rra | count 1
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define i16 @lsr2u16(i16 %x.arg) nounwind {
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%retval = alloca i16
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%x = alloca i16
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store i16 %x.arg, i16* %x
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%1 = load i16* %x
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%2 = lshr i16 %1, 2
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store i16 %2, i16* %retval
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br label %return
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return:
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%3 = load i16* %retval
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ret i16 %3
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}
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