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Disable ldc1/sdc1 instructions for mips1 targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88887 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -48,6 +48,7 @@ let PrintMethod = "printFCCOperand" in
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def In32BitMode : Predicate<"!Subtarget.isFP64bit()">;
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def IsSingleFloat : Predicate<"Subtarget.isSingleFloat()">;
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def IsNotSingleFloat : Predicate<"!Subtarget.isSingleFloat()">;
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def IsNotMipsI : Predicate<"!Subtarget.isMips1()">;
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//===----------------------------------------------------------------------===//
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// Instruction Class Templates
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@ -173,7 +174,7 @@ let fd = 0 in {
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}
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/// Floating Point Memory Instructions
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let Predicates = [IsNotSingleFloat] in {
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let Predicates = [IsNotSingleFloat, IsNotMipsI] in {
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def LDC1 : FFI<0b110101, (outs AFGR64:$ft), (ins mem:$addr),
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"ldc1 $ft, $addr", [(set AFGR64:$ft, (load addr:$addr))]>;
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