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Added Thumb2 LDRD/STRD pre/post variants for disassembly only.

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Plus fixed the encoding of t2LDRDpci such that P = 1 and W = 0 (offset mode).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98217 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Johnny Chen
2010-03-11 01:13:36 +00:00
parent ae47e461eb
commit ae1757b452
3 changed files with 25 additions and 2 deletions
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25
lib/Target/ARM/ARMInstrThumb2.td
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@@ -150,6 +150,10 @@ def t2addrmode_imm8s4 : Operand<i32>,
let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
}
def t2am_imm8s4_offset : Operand<i32> {
let PrintMethod = "printT2AddrModeImm8s4OffsetOperand";
}
// t2addrmode_so_reg := reg + (reg << imm2)
def t2addrmode_so_reg : Operand<i32>,
ComplexPattern<i32, 3, "SelectT2AddrModeSoReg", []> {
@@ -903,7 +907,7 @@ let mayLoad = 1, hasExtraDefRegAllocReq = 1 in {
def t2LDRDi8 : T2Ii8s4<1, 0, 1, (outs GPR:$dst1, GPR:$dst2),
(ins t2addrmode_imm8s4:$addr),
IIC_iLoadi, "ldrd", "\t$dst1, $addr", []>;
def t2LDRDpci : T2Ii8s4<?, ?, 1, (outs GPR:$dst1, GPR:$dst2),
def t2LDRDpci : T2Ii8s4<1, 0, 1, (outs GPR:$dst1, GPR:$dst2),
(ins i32imm:$addr), IIC_iLoadi,
"ldrd", "\t$dst1, $addr", []> {
let Inst{19-16} = 0b1111; // Rn
@@ -1105,7 +1109,24 @@ def t2STRT : T2IstT<0b10, "strt">;
def t2STRBT : T2IstT<0b00, "strbt">;
def t2STRHT : T2IstT<0b01, "strht">;
// FIXME: ldrd / strd pre / post variants
// ldrd / strd pre / post variants
// For disassembly only.
def t2LDRD_PRE : T2Ii8s4<1, 1, 1, (outs GPR:$dst1, GPR:$dst2),
(ins GPR:$base, t2am_imm8s4_offset:$imm), NoItinerary,
"ldrd", "\t$dst1, $dst2, [$base, $imm]!", []>;
def t2LDRD_POST : T2Ii8s4<0, 1, 1, (outs GPR:$dst1, GPR:$dst2),
(ins GPR:$base, t2am_imm8s4_offset:$imm), NoItinerary,
"ldrd", "\t$dst1, $dst2, [$base], $imm", []>;
def t2STRD_PRE : T2Ii8s4<1, 1, 0, (outs),
(ins GPR:$src1, GPR:$src2, GPR:$base, t2am_imm8s4_offset:$imm),
NoItinerary, "strd", "\t$src1, $src2, [$base, $imm]!", []>;
def t2STRD_POST : T2Ii8s4<0, 1, 0, (outs),
(ins GPR:$src1, GPR:$src2, GPR:$base, t2am_imm8s4_offset:$imm),
NoItinerary, "strd", "\t$src1, $src2, [$base], $imm", []>;
// T2Ipl (Preload Data/Instruction) signals the memory system of possible future
// data/instruction access. These are for disassembly only.

1
lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
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@@ -120,6 +120,7 @@ namespace {
void printT2AddrModeImm8Operand(const MachineInstr *MI, int OpNum);
void printT2AddrModeImm8s4Operand(const MachineInstr *MI, int OpNum);
void printT2AddrModeImm8OffsetOperand(const MachineInstr *MI, int OpNum);
void printT2AddrModeImm8s4OffsetOperand(const MachineInstr *MI, int OpNum) {}
void printT2AddrModeSoRegOperand(const MachineInstr *MI, int OpNum);
void printCPSOptionOperand(const MachineInstr *MI, int OpNum) {}

1
lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
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@@ -68,6 +68,7 @@ public:
void printT2AddrModeImm8Operand(const MCInst *MI, unsigned OpNum) {}
void printT2AddrModeImm8s4Operand(const MCInst *MI, unsigned OpNum) {}
void printT2AddrModeImm8OffsetOperand(const MCInst *MI, unsigned OpNum) {}
void printT2AddrModeImm8s4OffsetOperand(const MCInst *MI, unsigned OpNum) {}
void printT2AddrModeSoRegOperand(const MCInst *MI, unsigned OpNum) {}
void printCPSOptionOperand(const MCInst *MI, unsigned OpNum) {}