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Add intrinsic forms of mmx<->sse conversions. Notes:
Omission of memory form of PI2PD is intentional; this does not use an MMX register and does not put the chip into MMX mode (PI2PS, oddly enough, does). Operands of PI2PS follow the gcc builtin, not Intel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113388 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -471,6 +471,57 @@ def MMX_CVTTPS2PIrm : MMXI<0x2C, MRMSrcMem, (outs VR64:$dst), (ins f64mem:$src),
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"cvttps2pi\t{$src, $dst|$dst, $src}", []>;
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} // end neverHasSideEffects
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// Intrinsic versions.
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def MMX_CVTPD2PIirr : MMX2I<0x2D, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src),
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"cvtpd2pi\t{$src, $dst|$dst, $src}",
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[(set VR64:$dst, (int_x86_sse_cvtpd2pi VR128:$src))]>;
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def MMX_CVTPD2PIirm : MMX2I<0x2D, MRMSrcMem, (outs VR64:$dst),
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(ins f128mem:$src),
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"cvtpd2pi\t{$src, $dst|$dst, $src}",
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[(set VR64:$dst,
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(int_x86_sse_cvtpd2pi
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(bitconvert (loadv2i64 addr:$src))))]>;
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def MMX_CVTPI2PDirr : MMX2I<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR64:$src),
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"cvtpi2pd\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse_cvtpi2pd VR64:$src))]>;
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let Constraints = "$src1 = $dst" in {
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def MMX_CVTPI2PSirr : MMXI<0x2A, MRMSrcReg, (outs VR128:$dst),
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(ins VR128:$src1, VR64:$src2),
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"cvtpi2ps\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(int_x86_sse_cvtpi2ps VR128:$src1, VR64:$src2))]>;
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def MMX_CVTPI2PSirm : MMXI<0x2A, MRMSrcMem, (outs VR128:$dst),
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(ins VR128:$src1, i64mem:$src2),
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"cvtpi2ps\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(int_x86_sse_cvtpi2ps VR128:$src1,
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(bitconvert (load_mmx addr:$src2))))]>;
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}
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def MMX_CVTPS2PIirr : MMXI<0x2D, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src),
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"cvtps2pi\t{$src, $dst|$dst, $src}",
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[(set VR64:$dst, (int_x86_sse_cvtps2pi VR128:$src))]>;
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def MMX_CVTPS2PIirm : MMXI<0x2D, MRMSrcMem, (outs VR64:$dst), (ins f64mem:$src),
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"cvtps2pi\t{$src, $dst|$dst, $src}",
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[(set VR64:$dst,
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(int_x86_sse_cvtps2pi
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(bitconvert (load_mmx addr:$src))))]>;
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def MMX_CVTTPD2PIirr: MMX2I<0x2C, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src),
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"cvttpd2pi\t{$src, $dst|$dst, $src}",
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[(set VR64:$dst, (int_x86_sse_cvtpd2pi VR128:$src))]>;
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def MMX_CVTTPD2PIirm: MMX2I<0x2C, MRMSrcMem, (outs VR64:$dst),
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(ins f128mem:$src),
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"cvttpd2pi\t{$src, $dst|$dst, $src}",
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[(set VR64:$dst,
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(int_x86_sse_cvtpd2pi
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(bitconvert (loadv2i64 addr:$src))))]>;
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def MMX_CVTTPS2PIirr: MMXI<0x2C, MRMSrcReg, (outs VR64:$dst), (ins VR128:$src),
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"cvttps2pi\t{$src, $dst|$dst, $src}",
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[(set VR64:$dst, (int_x86_sse_cvtps2pi VR128:$src))]>;
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def MMX_CVTTPS2PIirm: MMXI<0x2C, MRMSrcMem, (outs VR64:$dst), (ins f64mem:$src),
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"cvttps2pi\t{$src, $dst|$dst, $src}",
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[(set VR64:$dst,
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(int_x86_sse_cvtpd2pi
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(bitconvert (load_mmx addr:$src))))]>;
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// Extract / Insert
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def MMX_X86pinsrw : SDNode<"X86ISD::MMX_PINSRW",
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