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ARM: spot SBFX-compatbile code expressed with sign_extend_inreg
We were assuming all SBFX-like operations would have the shl/asr form, but often when the field being extracted is an i8 or i16, we end up with a SIGN_EXTEND_INREG acting on a shift instead. Simple enough to check for though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213754 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2361,6 +2361,25 @@ SDNode *ARMDAGToDAGISel::SelectV6T2BitfieldExtractOp(SDNode *N,
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return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops);
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return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops);
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}
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}
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}
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}
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if (N->getOpcode() == ISD::SIGN_EXTEND_INREG) {
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unsigned Width = cast<VTSDNode>(N->getOperand(1))->getVT().getSizeInBits();
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unsigned LSB = 0;
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if (!isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::SRL, LSB) &&
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!isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::SRA, LSB))
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return nullptr;
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if (LSB + Width > 32)
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return nullptr;
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SDValue Reg0 = CurDAG->getRegister(0, MVT::i32);
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SDValue Ops[] = { N->getOperand(0).getOperand(0),
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CurDAG->getTargetConstant(LSB, MVT::i32),
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CurDAG->getTargetConstant(Width - 1, MVT::i32),
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getAL(CurDAG), Reg0 };
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return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops);
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}
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return nullptr;
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return nullptr;
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}
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}
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@ -2509,6 +2528,7 @@ SDNode *ARMDAGToDAGISel::Select(SDNode *N) {
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if (SDNode *I = SelectV6T2BitfieldExtractOp(N, false))
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if (SDNode *I = SelectV6T2BitfieldExtractOp(N, false))
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return I;
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return I;
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break;
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break;
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case ISD::SIGN_EXTEND_INREG:
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case ISD::SRA:
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case ISD::SRA:
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if (SDNode *I = SelectV6T2BitfieldExtractOp(N, true))
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if (SDNode *I = SelectV6T2BitfieldExtractOp(N, true))
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return I;
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return I;
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@ -45,3 +45,21 @@ entry:
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%tmp2 = ashr i32 %tmp, 1
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%tmp2 = ashr i32 %tmp, 1
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ret i32 %tmp2
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ret i32 %tmp2
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}
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}
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define signext i8 @f6(i32 %a) {
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; CHECK-LABEL: f6:
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; CHECK: sbfx r0, r0, #23, #8
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%tmp = lshr i32 %a, 23
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%res = trunc i32 %tmp to i8
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ret i8 %res
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}
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define signext i8 @f7(i32 %a) {
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; CHECK-LABEL: f7:
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; CHECK-NOT: sbfx
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%tmp = lshr i32 %a, 25
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%res = trunc i32 %tmp to i8
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ret i8 %res
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}
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@ -10,8 +10,7 @@ define i32 @test0(i8 %A) {
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define signext i8 @test1(i32 %A) {
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define signext i8 @test1(i32 %A) {
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; CHECK-LABEL: test1:
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; CHECK-LABEL: test1:
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; CHECK: lsrs r0, r0, #8
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; CHECK: sbfx r0, r0, #8, #8
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; CHECK: sxtb r0, r0
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%B = lshr i32 %A, 8
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%B = lshr i32 %A, 8
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%C = shl i32 %A, 24
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%C = shl i32 %A, 24
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%D = or i32 %B, %C
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%D = or i32 %B, %C
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