LLVM backend for 6502
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Tim Northover afb1938c39 ARM: spot SBFX-compatbile code expressed with sign_extend_inreg
We were assuming all SBFX-like operations would have the shl/asr form, but
often when the field being extracted is an i8 or i16, we end up with a
SIGN_EXTEND_INREG acting on a shift instead. Simple enough to check for though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213754 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 13:59:12 +00:00
autoconf
bindings [OCaml] Don't truncate constants over 32 bits in Llvm.const_int. 2014-07-22 13:55:20 +00:00
cmake Add LLVM_TOOLS_BINARY_DIR variable to LLVMConfig.cmake so clients 2014-07-22 17:48:51 +00:00
docs Added release notes for MIPS. 2014-07-23 12:59:26 +00:00
examples Added LLVM_ENABLE_RTTI and LLVM_ENABLE_EH options that allow RTTI and EH 2014-07-22 15:41:18 +00:00
include AArch64: remove arm64 triple enumerator. 2014-07-23 12:32:47 +00:00
lib ARM: spot SBFX-compatbile code expressed with sign_extend_inreg 2014-07-23 13:59:12 +00:00
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test ARM: spot SBFX-compatbile code expressed with sign_extend_inreg 2014-07-23 13:59:12 +00:00
tools [MCJIT] Refactor and add stub inspection to the RuntimeDyldChecker framework. 2014-07-22 22:47:39 +00:00
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Low Level Virtual Machine (LLVM)
================================

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