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Move zext and sext casts fed by loads into the same block as the

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load, to help SelectionDAG fold them into the loads, unless
conditions are unfavorable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84271 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2009-10-16 20:59:35 +00:00
parent a43d46f523
commit b00f236b03
3 changed files with 63 additions and 3 deletions
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42
lib/Transforms/Scalar/CodeGenPrepare.cpp
View File

@ -73,6 +73,7 @@ namespace {
DenseMap<Value*,Value*> &SunkAddrs);
bool OptimizeInlineAsmInst(Instruction *I, CallSite CS,
DenseMap<Value*,Value*> &SunkAddrs);
bool MoveExtToFormExtLoad(Instruction *I);
bool OptimizeExtUses(Instruction *I);
void findLoopBackEdges(const Function &F);
};
@ -731,6 +732,43 @@ bool CodeGenPrepare::OptimizeInlineAsmInst(Instruction *I, CallSite CS,
return MadeChange;
}
/// MoveExtToFormExtLoad - Move a zext or sext fed by a load into the same
/// basic block as the load, unless conditions are unfavorable. This allows
/// SelectionDAG to fold the extend into the load.
///
bool CodeGenPrepare::MoveExtToFormExtLoad(Instruction *I) {
// Look for a load being extended.
LoadInst *LI = dyn_cast<LoadInst>(I->getOperand(0));
if (!LI) return false;
// If they're already in the same block, there's nothing to do.
if (LI->getParent() == I->getParent())
return false;
// If the load has other users and the truncate is not free, this probably
// isn't worthwhile.
if (!LI->hasOneUse() &&
TLI && !TLI->isTruncateFree(I->getType(), LI->getType()))
return false;
// Check whether the target supports casts folded into loads.
unsigned LType;
if (isa<ZExtInst>(I))
LType = ISD::ZEXTLOAD;
else {
assert(isa<SExtInst>(I) && "Unexpected ext type!");
LType = ISD::SEXTLOAD;
}
if (TLI && !TLI->isLoadExtLegal(LType, TLI->getValueType(LI->getType())))
return false;
// Move the extend into the same block as the load, so that SelectionDAG
// can fold it.
I->removeFromParent();
I->insertAfter(LI);
return true;
}
bool CodeGenPrepare::OptimizeExtUses(Instruction *I) {
BasicBlock *DefBB = I->getParent();
@ -846,8 +884,10 @@ bool CodeGenPrepare::OptimizeBlock(BasicBlock &BB) {
MadeChange |= Change;
}
if (!Change && (isa<ZExtInst>(I) || isa<SExtInst>(I)))
if (!Change && (isa<ZExtInst>(I) || isa<SExtInst>(I))) {
MadeChange |= MoveExtToFormExtLoad(I);
MadeChange |= OptimizeExtUses(I);
}
} else if (CmpInst *CI = dyn_cast<CmpInst>(I)) {
MadeChange |= OptimizeCmpExpression(CI);
} else if (LoadInst *LI = dyn_cast<LoadInst>(I)) {

20
test/CodeGen/X86/codegen-prepare-extload.ll Normal file
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@ -0,0 +1,20 @@
; RUN: llc < %s -march=x86-64 | FileCheck %s
; rdar://7304838
; CodeGenPrepare should move the zext into the block with the load
; so that SelectionDAG can select it with the load.
; CHECK: movzbl (%rdi), %eax
define void @foo(i8* %p, i32* %q) {
entry:
%t = load i8* %p
%a = icmp slt i8 %t, 20
br i1 %a, label %true, label %false
true:
%s = zext i8 %t to i32
store i32 %s, i32* %q
ret void
false:
ret void
}

4
test/CodeGen/X86/stack-color-with-reg.ll
View File

@ -1,6 +1,6 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t
; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 5
; RUN: grep asm-printer %t | grep 179
; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 6
; RUN: grep asm-printer %t | grep 177
type { [62 x %struct.Bitvec*] } ; type %0
type { i8* } ; type %1