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Thumb2 assembly parsing and encoding for SSAT.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139926 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-09-16 18:32:30 +00:00
parent 05ec8f7ac9
commit b105b997a4
2 changed files with 25 additions and 2 deletions
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11
lib/Target/ARM/ARMInstrThumb2.td
View File

@ -2019,7 +2019,7 @@ def t2SSAT16: T2SatI<
}
def t2USAT: T2SatI<
(outs rGPR:$Rd), (ins i32imm:$sat_imm, rGPR:$Rn, shift_imm:$sh),
(outs rGPR:$Rd), (ins imm0_31:$sat_imm, rGPR:$Rn, shift_imm:$sh),
NoItinerary, "usat", "\t$Rd, $sat_imm, $Rn$sh",
[/* For disassembly only; pattern left blank */]> {
let Inst{31-27} = 0b11110;
@ -2028,7 +2028,7 @@ def t2USAT: T2SatI<
let Inst{15} = 0;
}
def t2USAT16: T2SatI<(outs rGPR:$Rd), (ins i32imm:$sat_imm, rGPR:$Rn),
def t2USAT16: T2SatI<(outs rGPR:$Rd), (ins imm0_15:$sat_imm, rGPR:$Rn),
NoItinerary,
"usat16", "\t$Rd, $sat_imm, $Rn",
[/* For disassembly only; pattern left blank */]>,
@ -3854,3 +3854,10 @@ def : t2InstAlias<"rsb${s}${p} $Rdn, $Rm",
def : t2InstAlias<"rsb${s}${p} $Rdn, $ShiftedRm",
(t2RSBrs rGPR:$Rdn, rGPR:$Rdn, t2_so_reg:$ShiftedRm, pred:$p,
cc_out:$s)>;
// SSAT/USAT optional shift operand.
def : t2InstAlias<"ssat${p} $Rd, $sat_imm, $Rn",
(t2SSAT rGPR:$Rd, imm1_32:$sat_imm, rGPR:$Rn, 0, pred:$p)>;
def : t2InstAlias<"usat${p} $Rd, $sat_imm, $Rn",
(t2USAT rGPR:$Rd, imm0_31:$sat_imm, rGPR:$Rn, 0, pred:$p)>;

16
test/MC/ARM/basic-thumb2-instructions.s
View File

@ -2048,6 +2048,22 @@ _func:
@ CHECK: srsia sp!, #5 @ encoding: [0xad,0xe9,0x05,0xc0]
@------------------------------------------------------------------------------
@ SSAT
@------------------------------------------------------------------------------
ssat r8, #1, r10
ssat r8, #1, r10, lsl #0
ssat r8, #1, r10, lsl #31
ssat r8, #1, r10, asr #32
ssat r8, #1, r10, asr #1
@ CHECK: ssat r8, #1, r10 @ encoding: [0x0a,0xf3,0x00,0x08]
@ CHECK: ssat r8, #1, r10 @ encoding: [0x0a,0xf3,0x00,0x08]
@ CHECK: ssat r8, #1, r10, lsl #31 @ encoding: [0x0a,0xf3,0xc0,0x78]
@ CHECK: ssat r8, #1, r10, asr #32 @ encoding: [0x2a,0xf3,0x00,0x08]
@ CHECK: ssat r8, #1, r10, asr #1 @ encoding: [0x2a,0xf3,0x40,0x08]
@------------------------------------------------------------------------------
@ SUB (register)
@------------------------------------------------------------------------------