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PR9535: add support for splitting and scalarizing vector ISD::FP_ROUND.
Also cleaning up some duplicated code while I'm here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128176 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -50,6 +50,7 @@ void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
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case ISD::BUILD_VECTOR: R = N->getOperand(0); break;
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case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
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case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
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case ISD::FP_ROUND: R = ScalarizeVecRes_FP_ROUND(N); break;
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case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
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case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
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case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
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@@ -151,6 +152,13 @@ SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
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N->getOperand(0), N->getOperand(1));
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}
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SDValue DAGTypeLegalizer::ScalarizeVecRes_FP_ROUND(SDNode *N) {
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EVT NewVT = N->getValueType(0).getVectorElementType();
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SDValue Op = GetScalarizedVector(N->getOperand(0));
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return DAG.getNode(ISD::FP_ROUND, N->getDebugLoc(),
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NewVT, Op, N->getOperand(1));
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}
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SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
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SDValue Op = GetScalarizedVector(N->getOperand(0));
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return DAG.getNode(ISD::FPOWI, N->getDebugLoc(),
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@@ -411,11 +419,9 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
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case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
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case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
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case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
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case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
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case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
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case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
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case ISD::CONVERT_RNDSAT: SplitVecRes_CONVERT_RNDSAT(N, Lo, Hi); break;
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case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
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case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
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case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
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@@ -434,6 +440,7 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
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break;
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case ISD::ANY_EXTEND:
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case ISD::CONVERT_RNDSAT:
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case ISD::CTLZ:
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case ISD::CTPOP:
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case ISD::CTTZ:
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@@ -449,6 +456,7 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
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case ISD::FNEARBYINT:
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case ISD::FNEG:
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case ISD::FP_EXTEND:
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case ISD::FP_ROUND:
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case ISD::FP_TO_SINT:
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case ISD::FP_TO_UINT:
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case ISD::FRINT:
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@@ -594,60 +602,6 @@ void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
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Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
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}
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void DAGTypeLegalizer::SplitVecRes_CONVERT_RNDSAT(SDNode *N, SDValue &Lo,
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SDValue &Hi) {
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EVT LoVT, HiVT;
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DebugLoc dl = N->getDebugLoc();
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GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
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SDValue DTyOpLo = DAG.getValueType(LoVT);
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SDValue DTyOpHi = DAG.getValueType(HiVT);
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SDValue RndOp = N->getOperand(3);
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SDValue SatOp = N->getOperand(4);
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ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
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// Split the input.
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SDValue VLo, VHi;
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EVT InVT = N->getOperand(0).getValueType();
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switch (getTypeAction(InVT)) {
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default: llvm_unreachable("Unexpected type action!");
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case Legal: {
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EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
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LoVT.getVectorNumElements());
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VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
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DAG.getIntPtrConstant(0));
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VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
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DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
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break;
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}
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case SplitVector:
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GetSplitVector(N->getOperand(0), VLo, VHi);
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break;
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case WidenVector: {
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// If the result needs to be split and the input needs to be widened,
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// the two types must have different lengths. Use the widened result
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// and extract from it to do the split.
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SDValue InOp = GetWidenedVector(N->getOperand(0));
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EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
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LoVT.getVectorNumElements());
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VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
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DAG.getIntPtrConstant(0));
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VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
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DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
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break;
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}
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}
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SDValue STyOpLo = DAG.getValueType(VLo.getValueType());
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SDValue STyOpHi = DAG.getValueType(VHi.getValueType());
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Lo = DAG.getConvertRndSat(LoVT, dl, VLo, DTyOpLo, STyOpLo, RndOp, SatOp,
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CvtCode);
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Hi = DAG.getConvertRndSat(HiVT, dl, VHi, DTyOpHi, STyOpHi, RndOp, SatOp,
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CvtCode);
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}
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void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
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SDValue &Hi) {
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SDValue Vec = N->getOperand(0);
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@@ -847,8 +801,25 @@ void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
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}
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}
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Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
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Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
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if (N->getOpcode() == ISD::FP_ROUND) {
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Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo, N->getOperand(1));
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Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi, N->getOperand(1));
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} else if (N->getOpcode() == ISD::CONVERT_RNDSAT) {
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SDValue DTyOpLo = DAG.getValueType(LoVT);
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SDValue DTyOpHi = DAG.getValueType(HiVT);
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SDValue STyOpLo = DAG.getValueType(Lo.getValueType());
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SDValue STyOpHi = DAG.getValueType(Hi.getValueType());
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SDValue RndOp = N->getOperand(3);
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SDValue SatOp = N->getOperand(4);
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ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
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Lo = DAG.getConvertRndSat(LoVT, dl, Lo, DTyOpLo, STyOpLo, RndOp, SatOp,
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CvtCode);
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Hi = DAG.getConvertRndSat(HiVT, dl, Hi, DTyOpHi, STyOpHi, RndOp, SatOp,
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CvtCode);
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} else {
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Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
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Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
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}
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}
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void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
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@@ -2018,7 +1989,6 @@ bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned ResNo) {
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case ISD::STORE: Res = WidenVecOp_STORE(N); break;
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case ISD::FP_EXTEND:
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case ISD::FP_ROUND:
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case ISD::FP_TO_SINT:
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case ISD::FP_TO_UINT:
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case ISD::SINT_TO_FP:
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