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ARM: fix @llvm.convert.from.fp16 on softfloat targets.

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We need to make sure we use the softened version of all appropriate operands in
the libcall, or things go horribly wrong. This may entail actually executing a
1-stage softening.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214175 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2014-07-29 09:56:38 +00:00
parent 66c0ebf171
commit b1692ad2c3
2 changed files with 19 additions and 1 deletions
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7
lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
View File

@ -377,10 +377,15 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
// There's only a libcall for f16 -> f32, so proceed in two stages. Also, it's
// entirely possible for both f16 and f32 to be legal, so use the fully
// hard-float FP_EXTEND rather than FP16_TO_FP.
if (Op.getValueType() == MVT::f16 && N->getValueType(0) != MVT::f32)
if (Op.getValueType() == MVT::f16 && N->getValueType(0) != MVT::f32) {
Op = DAG.getNode(ISD::FP_EXTEND, SDLoc(N), MVT::f32, Op);
if (getTypeAction(MVT::f32) == TargetLowering::TypeSoftenFloat)
SoftenFloatResult(Op.getNode(), 0);
}
RTLIB::Libcall LC = RTLIB::getFPEXT(Op.getValueType(), N->getValueType(0));
if (getTypeAction(Op.getValueType()) == TargetLowering::TypeSoftenFloat)
Op = GetSoftenedFloat(Op);
assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
return TLI.makeLibCall(DAG, LC, NVT, &Op, 1, false, SDLoc(N)).first;
}

13
test/CodeGen/ARM/fp16.ll
View File

@ -1,6 +1,8 @@
; RUN: llc < %s | FileCheck %s
; RUN: llc -mattr=+vfp3,+fp16 < %s | FileCheck --check-prefix=CHECK-FP16 %s
; RUN: llc -mtriple=armv8-eabi < %s | FileCheck --check-prefix=CHECK-ARMV8 %s
; RUN: llc -mtriple=thumbv7m-eabi < %s | FileCheck --check-prefix=CHECK-SOFTFLOAT %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
target triple = "armv7-eabi"
@ -12,6 +14,7 @@ define arm_aapcs_vfpcc void @foo() nounwind {
; CHECK-LABEL: foo:
; CHECK-FP16-LABEL: foo:
; CHECK-ARMV8-LABEL: foo:
; CHECK-SOFTFLOAT-LABEL: foo:
entry:
%0 = load i16* @x, align 2
%1 = load i16* @y, align 2
@ -19,15 +22,18 @@ entry:
; CHECK: __gnu_h2f_ieee
; CHECK-FP16: vcvtb.f32.f16
; CHECK-ARMv8: vcvtb.f32.f16
; CHECK-SOFTFLOAT: __gnu_h2f_ieee
%3 = tail call float @llvm.convert.from.fp16.f32(i16 %1)
; CHECK: __gnu_h2f_ieee
; CHECK-FP16: vcvtb.f32.f16
; CHECK-ARMV8: vcvtb.f32.f16
; CHECK-SOFTFLOAT: __gnu_h2f_ieee
%4 = fadd float %2, %3
%5 = tail call i16 @llvm.convert.to.fp16.f32(float %4)
; CHECK: __gnu_f2h_ieee
; CHECK-FP16: vcvtb.f16.f32
; CHECK-ARMV8: vcvtb.f16.f32
; CHECK-SOFTFLOAT: __gnu_f2h_ieee
store i16 %5, i16* @x, align 2
ret void
}
@ -36,6 +42,7 @@ define arm_aapcs_vfpcc double @test_from_fp16(i16 %in) {
; CHECK-LABEL: test_from_fp16:
; CHECK-FP-LABEL: test_from_fp16:
; CHECK-ARMV8-LABEL: test_from_fp16:
; CHECK-SOFTFLOAT-LABEL: test_from_fp16:
%val = call double @llvm.convert.from.fp16.f64(i16 %in)
; CHECK: bl __gnu_h2f_ieee
; CHECK: vmov [[TMP:s[0-9]+]], r0
@ -47,6 +54,9 @@ define arm_aapcs_vfpcc double @test_from_fp16(i16 %in) {
; CHECK-ARMV8: vmov [[TMP:s[0-9]+]], r0
; CHECK-ARMV8: vcvtb.f64.f16 d0, [[TMP]]
; CHECK-SOFTFLOAT: bl __gnu_h2f_ieee
; CHECK-SOFTFLOAT: bl __aeabi_f2d
ret double %val
}
@ -54,6 +64,7 @@ define arm_aapcs_vfpcc i16 @test_to_fp16(double %in) {
; CHECK-LABEL: test_to_fp16:
; CHECK-FP-LABEL: test_to_fp16:
; CHECK-ARMV8-LABEL: test_to_fp16:
; CHECK-SOFTFLOAT-LABEL: test_to_fp16:
%val = call i16 @llvm.convert.to.fp16.f64(double %in)
; CHECK: bl __truncdfhf2
@ -61,6 +72,8 @@ define arm_aapcs_vfpcc i16 @test_to_fp16(double %in) {
; CHECK-ARMV8: vcvtb.f16.f64 [[TMP:s[0-9]+]], d0
; CHECK-ARMV8: vmov r0, [[TMP]]
; CHECK-SOFTFLOAT: bl __truncdfhf2
ret i16 %val
}