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[X86] Increase X86_MAX_OPERANDS from 5 to 6

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This controls the number of operands in the disassembler's x86OperandSets
table.  The entries describe how the operand is encoded and its type.

Not to surprisingly 5 operands is insufficient for AVX512.  Consider
VALIGNDrrik in the next patch.  These are its operand specifiers:

  { /* 328 */
    { ENCODING_DUP, TYPE_DUP1 },
    { ENCODING_REG, TYPE_XMM512 },
    { ENCODING_WRITEMASK, TYPE_VK8 },
    { ENCODING_VVVV, TYPE_XMM512 },
    { ENCODING_RM_CD64, TYPE_XMM512 },
    { ENCODING_IB, TYPE_IMM8 },
  },

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214889 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Adam Nemet
2014-08-05 17:23:01 +00:00
parent af98f76fb5
commit b1f410a35b
1 changed files with 1 additions and 1 deletions
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lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h
+1 -1
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@@ -500,7 +500,7 @@ enum ModifierType {
};
#undef ENUM_ENTRY
static const unsigned X86_MAX_OPERANDS = 5;
static const unsigned X86_MAX_OPERANDS = 6;
/// Decoding mode for the Intel disassembler. 16-bit, 32-bit, and 64-bit mode
/// are supported, and represent real mode, IA-32e, and IA-32e in 64-bit mode,