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Add code generator support for VSELECT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27542 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4773,6 +4773,11 @@ SDOperand SelectionDAGLegalize::PackVectorOp(SDOperand Op,
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assert(0 && "Cast from unsupported vector type not implemented yet!");
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}
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}
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case ISD::VSELECT:
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Result = DAG.getNode(ISD::SELECT, NewVT, Op.getOperand(0),
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PackVectorOp(Op.getOperand(1), NewVT),
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PackVectorOp(Op.getOperand(2), NewVT));
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break;
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}
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if (TLI.isTypeLegal(NewVT))
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@ -2760,15 +2760,16 @@ const char *SDNode::getOperationName(const SelectionDAG *G) const {
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case ISD::SETCC: return "setcc";
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case ISD::SELECT: return "select";
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case ISD::SELECT_CC: return "select_cc";
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case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
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case ISD::VINSERT_VECTOR_ELT: return "vinsert_vector_elt";
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case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
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case ISD::VSELECT: return "vselect";
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case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
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case ISD::VINSERT_VECTOR_ELT: return "vinsert_vector_elt";
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case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
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case ISD::VEXTRACT_VECTOR_ELT: return "vextract_vector_elt";
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case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
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case ISD::VBUILD_VECTOR: return "vbuild_vector";
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case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
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case ISD::VVECTOR_SHUFFLE: return "vvector_shuffle";
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case ISD::VBIT_CONVERT: return "vbit_convert";
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case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
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case ISD::VBUILD_VECTOR: return "vbuild_vector";
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case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
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case ISD::VVECTOR_SHUFFLE: return "vvector_shuffle";
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case ISD::VBIT_CONVERT: return "vbit_convert";
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case ISD::ADDC: return "addc";
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case ISD::ADDE: return "adde";
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case ISD::SUBC: return "subc";
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@ -992,8 +992,14 @@ void SelectionDAGLowering::visitSelect(User &I) {
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SDOperand Cond = getValue(I.getOperand(0));
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SDOperand TrueVal = getValue(I.getOperand(1));
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SDOperand FalseVal = getValue(I.getOperand(2));
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setValue(&I, DAG.getNode(ISD::SELECT, TrueVal.getValueType(), Cond,
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TrueVal, FalseVal));
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if (!isa<PackedType>(I.getType())) {
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setValue(&I, DAG.getNode(ISD::SELECT, TrueVal.getValueType(), Cond,
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TrueVal, FalseVal));
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} else {
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setValue(&I, DAG.getNode(ISD::VSELECT, MVT::Vector, Cond, TrueVal, FalseVal,
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*(TrueVal.Val->op_end()-2),
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*(TrueVal.Val->op_end()-1)));
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}
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}
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void SelectionDAGLowering::visitCast(User &I) {
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