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More removal of std::cerr and DEBUG, replacing with DOUT instead.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31806 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2006-11-17 02:09:07 +00:00
parent 280b714cd0
commit b2b9c20b61
3 changed files with 72 additions and 65 deletions
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53
lib/CodeGen/RegAllocLocal.cpp
View File

@ -30,7 +30,6 @@
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include <algorithm>
#include <iostream>
using namespace llvm;
namespace {
@ -270,10 +269,10 @@ void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
assert(VirtReg && "Spilling a physical register is illegal!"
" Must not have appropriate kill for the register or use exists beyond"
" the intended one.");
DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
std::cerr << " containing %reg" << VirtReg;
if (!isVirtRegModified(VirtReg))
std::cerr << " which has not been modified, so no store necessary!");
DOUT << " Spilling register " << RegInfo->getName(PhysReg)
<< " containing %reg" << VirtReg;
if (!isVirtRegModified(VirtReg))
DOUT << " which has not been modified, so no store necessary!";
// Otherwise, there is a virtual register corresponding to this physical
// register. We only need to spill it into its stack slot if it has been
@ -281,14 +280,14 @@ void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
if (isVirtRegModified(VirtReg)) {
const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
int FrameIndex = getStackSpaceFor(VirtReg, RC);
DEBUG(std::cerr << " to stack slot #" << FrameIndex);
DOUT << " to stack slot #" << FrameIndex;
RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
++NumStores; // Update statistics
}
getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
DEBUG(std::cerr << "\n");
DOUT << "\n";
removePhysReg(PhysReg);
}
@ -318,9 +317,9 @@ void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
// No more use of %EAX, %AH, etc.
// %EAX isn't dead upon definition, but %AH is. However %AH isn't
// an operand of definition MI so it's not marked as such.
DEBUG(std::cerr << " Register " << RegInfo->getName(*AliasSet)
<< " [%reg" << *AliasSet
<< "] is never used, removing it frame live list\n");
DOUT << " Register " << RegInfo->getName(*AliasSet)
<< " [%reg" << *AliasSet
<< "] is never used, removing it frame live list\n";
removePhysReg(*AliasSet);
} else
spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
@ -506,8 +505,8 @@ MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
<< RegInfo->getName(PhysReg) << "\n");
DOUT << " Reloading %reg" << VirtReg << " into "
<< RegInfo->getName(PhysReg) << "\n";
// Add move instruction(s)
RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
@ -526,7 +525,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
const TargetInstrInfo &TII = *TM->getInstrInfo();
DEBUG(const BasicBlock *LBB = MBB.getBasicBlock();
if (LBB) std::cerr << "\nStarting RegAlloc of BB: " << LBB->getName());
if (LBB) DOUT << "\nStarting RegAlloc of BB: " << LBB->getName());
// If this is the first basic block in the machine function, add live-in
// registers as active.
@ -552,13 +551,13 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
while (MII != MBB.end()) {
MachineInstr *MI = MII++;
const TargetInstrDescriptor &TID = TII.get(MI->getOpcode());
DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
std::cerr << " Regs have values: ";
DEBUG(DOUT << "\nStarting RegAlloc of: " << *MI;
DOUT << " Regs have values: ";
for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i)
if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
std::cerr << "[" << RegInfo->getName(i)
<< ",%reg" << PhysRegsUsed[i] << "] ";
std::cerr << "\n");
DOUT << "[" << RegInfo->getName(i)
<< ",%reg" << PhysRegsUsed[i] << "] ";
DOUT << "\n");
// Loop over the implicit uses, making sure that they are at the head of the
// use order list, so they don't get reallocated.
@ -608,15 +607,15 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
}
if (PhysReg) {
DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
<< "[%reg" << VirtReg <<"], removing it from live set\n");
DOUT << " Last use of " << RegInfo->getName(PhysReg)
<< "[%reg" << VirtReg <<"], removing it from live set\n";
removePhysReg(PhysReg);
for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
*AliasSet; ++AliasSet) {
if (PhysRegsUsed[*AliasSet] != -2) {
DEBUG(std::cerr << " Last use of "
DOUT << " Last use of "
<< RegInfo->getName(*AliasSet)
<< "[%reg" << VirtReg <<"], removing it from live set\n");
<< "[%reg" << VirtReg <<"], removing it from live set\n";
removePhysReg(*AliasSet);
}
}
@ -718,16 +717,16 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
}
if (PhysReg) {
DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
DOUT << " Register " << RegInfo->getName(PhysReg)
<< " [%reg" << VirtReg
<< "] is never used, removing it frame live list\n");
<< "] is never used, removing it frame live list\n";
removePhysReg(PhysReg);
for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
*AliasSet; ++AliasSet) {
if (PhysRegsUsed[*AliasSet] != -2) {
DEBUG(std::cerr << " Register " << RegInfo->getName(*AliasSet)
DOUT << " Register " << RegInfo->getName(*AliasSet)
<< " [%reg" << *AliasSet
<< "] is never used, removing it frame live list\n");
<< "] is never used, removing it frame live list\n";
removePhysReg(*AliasSet);
}
}
@ -775,7 +774,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
/// runOnMachineFunction - Register allocate the whole function
///
bool RA::runOnMachineFunction(MachineFunction &Fn) {
DEBUG(std::cerr << "Machine Function " << "\n");
DOUT << "Machine Function " << "\n";
MF = &Fn;
TM = &Fn.getTarget();
RegInfo = TM->getRegisterInfo();

82
lib/CodeGen/VirtRegMap.cpp
View File

@ -30,7 +30,6 @@
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
#include <algorithm>
#include <iostream>
using namespace llvm;
namespace {
@ -113,6 +112,11 @@ void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
}
void VirtRegMap::print(std::ostream &OS) const {
llvm_ostream LOS(OS);
print(LOS);
}
void VirtRegMap::print(llvm_ostream &OS) const {
const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo();
OS << "********** REGISTER MAP **********\n";
@ -130,7 +134,10 @@ void VirtRegMap::print(std::ostream &OS) const {
OS << '\n';
}
void VirtRegMap::dump() const { print(std::cerr); }
void VirtRegMap::dump() const {
llvm_ostream OS = DOUT;
print(OS);
}
//===----------------------------------------------------------------------===//
@ -146,9 +153,8 @@ namespace {
}
bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
DEBUG(std::cerr << "********** Function: "
<< MF.getFunction()->getName() << '\n');
DOUT << "********** REWRITE MACHINE CODE **********\n";
DOUT << "********** Function: " << MF.getFunction()->getName() << '\n';
const TargetMachine &TM = MF.getTarget();
const MRegisterInfo &MRI = *TM.getRegisterInfo();
bool *PhysRegsUsed = MF.getUsedPhysregs();
@ -161,7 +167,7 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
MBBI != E; ++MBBI) {
DEBUG(std::cerr << MBBI->getBasicBlock()->getName() << ":\n");
DOUT << MBBI->getBasicBlock()->getName() << ":\n";
MachineBasicBlock &MBB = *MBBI;
for (MachineBasicBlock::iterator MII = MBB.begin(),
E = MBB.end(); MII != E; ++MII) {
@ -183,7 +189,7 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
LoadedRegs.push_back(VirtReg);
++NumLoads;
DEBUG(std::cerr << '\t' << *prior(MII));
DOUT << '\t' << *prior(MII);
}
if (MO.isDef()) {
@ -198,7 +204,7 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
}
}
DEBUG(std::cerr << '\t' << MI);
DOUT << '\t' << MI;
LoadedRegs.clear();
}
}
@ -221,8 +227,8 @@ namespace {
bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
MRI = MF.getTarget().getRegisterInfo();
TII = MF.getTarget().getInstrInfo();
DEBUG(std::cerr << "\n**** Local spiller rewriting function '"
<< MF.getFunction()->getName() << "':\n");
DOUT << "\n**** Local spiller rewriting function '"
<< MF.getFunction()->getName() << "':\n";
for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
MBB != E; ++MBB)
@ -293,8 +299,8 @@ public:
PhysRegsAvailable.insert(std::make_pair(Reg, Slot));
SpillSlotsAvailable[Slot] = (Reg << 1) | (unsigned)CanClobber;
DEBUG(std::cerr << "Remembering SS#" << Slot << " in physreg "
<< MRI->getName(Reg) << "\n");
DOUT << "Remembering SS#" << Slot << " in physreg "
<< MRI->getName(Reg) << "\n";
}
/// canClobberPhysReg - Return true if the spiller is allowed to change the
@ -328,8 +334,8 @@ void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) {
assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg &&
"Bidirectional map mismatch!");
SpillSlotsAvailable.erase(Slot);
DEBUG(std::cerr << "PhysReg " << MRI->getName(PhysReg)
<< " clobbered, invalidating SS#" << Slot << "\n");
DOUT << "PhysReg " << MRI->getName(PhysReg)
<< " clobbered, invalidating SS#" << Slot << "\n";
}
}
@ -486,9 +492,9 @@ namespace {
Spills.addAvailable(NewOp.StackSlot, NewPhysReg);
++NumLoads;
DEBUG(MachineBasicBlock::iterator MII = MI;
std::cerr << '\t' << *prior(MII));
DOUT << '\t' << *prior(MII));
DEBUG(std::cerr << "Reuse undone!\n");
DOUT << "Reuse undone!\n";
--NumReused;
// Finally, PhysReg is now available, go ahead and use it.
@ -506,7 +512,7 @@ namespace {
/// register allocator is done with them. If possible, avoid reloading vregs.
void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
DEBUG(std::cerr << MBB.getBasicBlock()->getName() << ":\n");
DOUT << MBB.getBasicBlock()->getName() << ":\n";
// Spills - Keep track of which spilled values are available in physregs so
// that we can choose to reuse the physregs instead of emitting reloads.
@ -600,10 +606,10 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
if (CanReuse) {
// If this stack slot value is already available, reuse it!
DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
<< MRI->getName(PhysReg) << " for vreg"
<< VirtReg <<" instead of reloading into physreg "
<< MRI->getName(VRM.getPhys(VirtReg)) << "\n");
DOUT << "Reusing SS#" << StackSlot << " from physreg "
<< MRI->getName(PhysReg) << " for vreg"
<< VirtReg <<" instead of reloading into physreg "
<< MRI->getName(VRM.getPhys(VirtReg)) << "\n";
MI.getOperand(i).setReg(PhysReg);
// The only technical detail we have is that we don't know that
@ -654,10 +660,10 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
// incoming, we don't need to inserted a dead copy.
if (DesignatedReg == PhysReg) {
// If this stack slot value is already available, reuse it!
DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
<< MRI->getName(PhysReg) << " for vreg"
<< VirtReg
<< " instead of reloading into same physreg.\n");
DOUT << "Reusing SS#" << StackSlot << " from physreg "
<< MRI->getName(PhysReg) << " for vreg"
<< VirtReg
<< " instead of reloading into same physreg.\n";
MI.getOperand(i).setReg(PhysReg);
ReusedOperands.markClobbered(PhysReg);
++NumReused;
@ -676,7 +682,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
Spills.addAvailable(StackSlot, DesignatedReg);
MI.getOperand(i).setReg(DesignatedReg);
DEBUG(std::cerr << '\t' << *prior(MII));
DOUT << '\t' << *prior(MII);
++NumReused;
continue;
}
@ -706,26 +712,26 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
Spills.addAvailable(StackSlot, PhysReg);
++NumLoads;
MI.getOperand(i).setReg(PhysReg);
DEBUG(std::cerr << '\t' << *prior(MII));
DOUT << '\t' << *prior(MII);
}
DEBUG(std::cerr << '\t' << MI);
DOUT << '\t' << MI;
// If we have folded references to memory operands, make sure we clear all
// physical registers that may contain the value of the spilled virtual
// register
VirtRegMap::MI2VirtMapTy::const_iterator I, End;
for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
DEBUG(std::cerr << "Folded vreg: " << I->second.first << " MR: "
<< I->second.second);
DOUT << "Folded vreg: " << I->second.first << " MR: "
<< I->second.second;
unsigned VirtReg = I->second.first;
VirtRegMap::ModRef MR = I->second.second;
if (!VRM.hasStackSlot(VirtReg)) {
DEBUG(std::cerr << ": No stack slot!\n");
DOUT << ": No stack slot!\n";
continue;
}
int SS = VRM.getStackSlot(VirtReg);
DEBUG(std::cerr << " - StackSlot: " << SS << "\n");
DOUT << " - StackSlot: " << SS << "\n";
// If this folded instruction is just a use, check to see if it's a
// straight load from the virt reg slot.
@ -736,7 +742,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
// If this spill slot is available, turn it into a copy (or nothing)
// instead of leaving it as a load!
if (unsigned InReg = Spills.getSpillSlotPhysReg(SS)) {
DEBUG(std::cerr << "Promoted Load To Copy: " << MI);
DOUT << "Promoted Load To Copy: " << MI;
MachineFunction &MF = *MBB.getParent();
if (DestReg != InReg) {
MRI->copyRegToReg(MBB, &MI, DestReg, InReg,
@ -764,7 +770,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
else {
// If we get here, the store is dead, nuke it now.
assert(VirtRegMap::isMod && "Can't be modref!");
DEBUG(std::cerr << "Removed dead store:\t" << *MDSI->second);
DOUT << "Removed dead store:\t" << *MDSI->second;
MBB.erase(MDSI->second);
VRM.RemoveFromFoldedVirtMap(MDSI->second);
MaybeDeadStores.erase(MDSI);
@ -813,7 +819,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
unsigned Src, Dst;
if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
++NumDCE;
DEBUG(std::cerr << "Removing now-noop copy: " << MI);
DOUT << "Removing now-noop copy: " << MI;
MBB.erase(&MI);
VRM.RemoveFromFoldedVirtMap(&MI);
goto ProcessNextInst;
@ -861,7 +867,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
PhysRegsUsed[PhysReg] = true;
ReusedOperands.markClobbered(PhysReg);
MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
DEBUG(std::cerr << "Store:\t" << *next(MII));
DOUT << "Store:\t" << *next(MII);
MI.getOperand(i).setReg(PhysReg);
// Check to see if this is a noop copy. If so, eliminate the
@ -870,7 +876,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
unsigned Src, Dst;
if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
++NumDCE;
DEBUG(std::cerr << "Removing now-noop copy: " << MI);
DOUT << "Removing now-noop copy: " << MI;
MBB.erase(&MI);
VRM.RemoveFromFoldedVirtMap(&MI);
goto ProcessNextInst;
@ -880,7 +886,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
// If there is a dead store to this stack slot, nuke it now.
MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
if (LastStore) {
DEBUG(std::cerr << "Removed dead store:\t" << *LastStore);
DOUT << "Removed dead store:\t" << *LastStore;
++NumDSE;
MBB.erase(LastStore);
VRM.RemoveFromFoldedVirtMap(LastStore);

2
lib/CodeGen/VirtRegMap.h
View File

@ -24,6 +24,7 @@
namespace llvm {
class MachineInstr;
class TargetInstrInfo;
class llvm_ostream;
class VirtRegMap {
public:
@ -144,6 +145,7 @@ namespace llvm {
}
void print(std::ostream &OS) const;
void print(llvm_ostream &OS) const;
void dump() const;
};