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[mips] Remove custom versions of CCState::AnalyzeReturn() and CCState::AnalyzeCallReturn().

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Summary:
The N32/N64 ABI's return f128 values in $f0 and $f2 for hard-float and $v0 and
$a0 for soft-float. The registers used in the soft-float case differ from the
usual $v0, and $v1 specified for return values.

Both cases were previously handled by duplicating the CCState::AnalyzeReturn()
and CCState::AnalyzeCallReturn() functions and modifying them to delegate to
a different assignment function for f128 and further replace the register type
for the hard-float case. There is a simpler way to do both of these.

We now use the common functions and select an initial assignment function based
on whether the original type is f128 or not. We then handle the hard-float case
using CCBitConvertToType<>.

No functional change.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5269

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218036 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders 2014-09-18 08:28:39 +00:00
parent f789dac2dd
commit b2f2aa9329
3 changed files with 29 additions and 54 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
lib/Target/Mips/MipsCallingConv.td
View File

@ -105,10 +105,25 @@ def RetCC_MipsN : CallingConv<[
CCIfType<[f64], CCAssignToReg<[D0_64, D2_64]>>
]>;
// In soft-mode, register A0_64, instead of V1_64, is used to return a long
// double value.
def RetCC_F128Soft : CallingConv<[
CCIfType<[i64], CCAssignToReg<[V0_64, A0_64]>>
// For soft-float, f128 values are returned in A0_64 rather than V1_64.
def RetCC_F128SoftFloat : CallingConv<[
CCAssignToReg<[V0_64, A0_64]>
]>;
// For hard-float, f128 values are returned as a pair of f64's rather than a
// pair of i64's.
def RetCC_F128HardFloat : CallingConv<[
CCBitConvertToType<f64>,
CCAssignToReg<[D0_64, D2_64]>
]>;
// Handle F128 specially since we can't identify the original type during the
// tablegen-erated code.
def RetCC_F128 : CallingConv<[
CCIfSubtarget<"abiUsesSoftFloat()",
CCIfType<[i64], CCDelegateTo<RetCC_F128SoftFloat>>>,
CCIfSubtargetNot<"abiUsesSoftFloat()",
CCIfType<[i64], CCDelegateTo<RetCC_F128HardFloat>>>
]>;
//===----------------------------------------------------------------------===//

53
lib/Target/Mips/MipsISelLowering.cpp
View File

@ -2373,6 +2373,8 @@ static bool CC_MipsO32_FP64(unsigned ValNo, MVT ValVT,
return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, F64Regs);
}
static bool originalTypeIsF128(const Type *Ty, const SDNode *CallNode);
#include "MipsGenCallingConv.inc"
//===----------------------------------------------------------------------===//
@ -2686,10 +2688,11 @@ MipsTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
SmallVector<CCValAssign, 16> RVLocs;
CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs,
*DAG.getContext());
MipsCC MipsCCInfo(CallConv, Subtarget, CCInfo);
MipsCCInfo.analyzeCallResult(Ins, Subtarget.abiUsesSoftFloat(),
CallNode, RetTy);
if (originalTypeIsF128(RetTy, CallNode))
CCInfo.AnalyzeCallResult(Ins, RetCC_F128);
else
CCInfo.AnalyzeCallResult(Ins, RetCC_Mips);
// Copy all of the result registers out of their specified physreg.
for (unsigned i = 0; i != RVLocs.size(); ++i) {
@ -2886,8 +2889,10 @@ MipsTargetLowering::LowerReturn(SDValue Chain,
MipsCC MipsCCInfo(CallConv, Subtarget, CCInfo);
// Analyze return values.
MipsCCInfo.analyzeReturn(Outs, Subtarget.abiUsesSoftFloat(),
MF.getFunction()->getReturnType());
if (originalTypeIsF128(MF.getFunction()->getReturnType(), nullptr))
CCInfo.AnalyzeReturn(Outs, RetCC_F128);
else
CCInfo.AnalyzeReturn(Outs, RetCC_Mips);
SDValue Flag;
SmallVector<SDValue, 4> RetOps(1, Chain);
@ -3471,44 +3476,6 @@ analyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Args,
}
}
template<typename Ty>
void MipsTargetLowering::MipsCC::
analyzeReturn(const SmallVectorImpl<Ty> &RetVals, bool IsSoftFloat,
const SDNode *CallNode, const Type *RetTy) const {
CCAssignFn *Fn;
if (IsSoftFloat && originalTypeIsF128(RetTy, CallNode))
Fn = RetCC_F128Soft;
else
Fn = RetCC_Mips;
for (unsigned I = 0, E = RetVals.size(); I < E; ++I) {
MVT VT = RetVals[I].VT;
ISD::ArgFlagsTy Flags = RetVals[I].Flags;
MVT RegVT = this->getRegVT(VT, RetTy, CallNode, IsSoftFloat);
if (Fn(I, VT, RegVT, CCValAssign::Full, Flags, this->CCInfo)) {
#ifndef NDEBUG
dbgs() << "Call result #" << I << " has unhandled type "
<< EVT(VT).getEVTString() << '\n';
#endif
llvm_unreachable(nullptr);
}
}
}
void MipsTargetLowering::MipsCC::
analyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, bool IsSoftFloat,
const SDNode *CallNode, const Type *RetTy) const {
analyzeReturn(Ins, IsSoftFloat, CallNode, RetTy);
}
void MipsTargetLowering::MipsCC::
analyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, bool IsSoftFloat,
const Type *RetTy) const {
analyzeReturn(Outs, IsSoftFloat, nullptr, RetTy);
}
void MipsTargetLowering::MipsCC::handleByValArg(unsigned ValNo, MVT ValVT,
MVT LocVT,
CCValAssign::LocInfo LocInfo,

7
lib/Target/Mips/MipsISelLowering.h
View File

@ -367,13 +367,6 @@ namespace llvm {
bool IsSoftFloat,
Function::const_arg_iterator FuncArg);
void analyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
bool IsSoftFloat, const SDNode *CallNode,
const Type *RetTy) const;
void analyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
bool IsSoftFloat, const Type *RetTy) const;
const CCState &getCCInfo() const { return CCInfo; }
/// hasByValArg - Returns true if function has byval arguments.